An electronic pen includes a signal generator, a power supply, and a resonance circuit. The signal generator is configured to generate a signal. The power supply is configured to supply power to the signal generator. The resonance circuit is configured to generate a current based on the signal and emit a magnetic field based on the current.

An integrated isolator circuit for isolating receiver and transmitter in a Time-Division Duplex transceiver is disclosed. The integrated isolator circuit comprises a first node, a second node and a third node. The integrated isolator circuit further comprises a fist capacitor connected in series with a first switch and connected between the first and second nodes. The integrated isolator circuit further comprises a first inductor connected between the first and second nodes and a second capacitor connected between the second node and the third node. The first switch has an on state and an off state, and the integrated isolator circuit is configured to have a different impedance at a certain operating frequency by controlling the state of the first switch.

The present invention relates to a frequency selective security paper and a method for manufacturing the same. The frequency selective security paper according to an exemplary embodiment of the present invention may include: a drafting paper for forming a paper; a frequency resonator formed on one surface of the drafting paper and formed in a form of a meandering line or a capacitor so as to resonate to a designated frequency when passing through a security search device; and a coating liquid including the frequency resonator therein and formed on the drafting paper.

The present invention relates to a frequency selective security paper and a method for manufacturing the same. The frequency selective security paper according to an exemplary embodiment of the present invention may include: a drafting paper for forming a paper; a frequency resonator formed on one surface of the drafting paper and formed in a form of a meandering line or a capacitor so as to resonate to a designated frequency when passing through a security search device; and a coating liquid including the frequency resonator therein and formed on the drafting paper.

Disclosed is an output matching network including a first transmission line and a second transmission line each having one end connected to a respective balanced port of a pair of balanced ports; a third transmission line having one end connected to an unbalanced port; and a fourth transmission line. A first capacitor is connected to the unbalanced port and a load. A second capacitor is connected to an end of the fourth transmission line. The third and fourth transmission lines are coupled to the first and second transmission lines.

The disclosure concerns a signal aggregator component designed to couple with an antenna element to form an antenna system, wherein the resulting antenna system can achieve one-hundred percent or greater efficiency in receiving mode. In addition, the antenna system can achieve specific polarization and gain in different sectors of the antenna radiation pattern. The signal aggregator functions to dynamically enable or disable any number of its RF ports to select the RF input signal to aggregate.

A balun includes a first winding which has a first terminal coupled to an input, and a second terminal coupled to a reference potential terminal. The balun includes a second winding magnetically coupled to the first winding. The second winding has a first terminal coupled to a first differential output, a second terminal coupled to a second differential output, and a tap coupled to the reference potential terminal. The balun includes a first capacitor which has a first terminal coupled to the first winding and a second terminal coupled to the second winding. The balun includes a third winding which has a first terminal coupled to the reference potential terminal and a floating second terminal. The balun includes a second capacitor which has a first terminal coupled to the third winding and a second terminal coupled to the second winding.

A splitter includes a common transmission line, a first transmission line, a second transmission line, a third transmission line, a fourth transmission line, a resistor, and a first reactance circuit. The common transmission line is coupled between a common port and a common node. The first transmission line is coupled between a first port and a first node. The second transmission line is coupled between a second port and a second node. The third transmission line is coupled between the common node and the first node. The fourth transmission line is coupled between the common node and the second node. The resistor is coupled between the first node and the second node. The first reactance circuit is coupled between the first node and the second node. The first reactance circuit includes a first inductor and a first capacitor coupled in parallel, but it does not include any resistor.

A splitter includes a common transmission line, a first transmission line, a second transmission line, a third transmission line, a fourth transmission line, a resistor, and a first reactance circuit. The common transmission line is coupled between a common port and a common node. The first transmission line is coupled between a first port and a first node. The second transmission line is coupled between a second port and a second node. The third transmission line is coupled between the common node and the first node. The fourth transmission line is coupled between the common node and the second node. The resistor is coupled between the first node and the second node. The first reactance circuit is coupled between the first node and the second node. The first reactance circuit includes a first inductor and a first capacitor coupled in parallel, but it does not include any resistor.

An integrated circuit (IC) including a first transceiver interface circuit extending longitudinally in a first direction substantially perpendicular to a second direction parallel to edge of the IC, wherein the first transceiver interface circuit comprises a first T-coil; and a second transceiver interface circuit extending longitudinally in the first direction, wherein the second transceiver interface circuit is staggered from the first transceiver interface circuit along the second direction, wherein the second transceiver interface circuit includes a second T-coil, and wherein the second T-coil is offset from the first T-coil along the first direction.