Embodiments provide a switching circuit including a transistor and a bias circuit. The transistor may transition between an off state and an on state responsive to a control signal received at a control terminal. The bias circuit may be coupled between the control terminal and a gate terminal of the transistor. The bias circuit may include a gate resistor coupled between the gate terminal and the control terminal. The bias circuit may further include one or more diodes coupled in parallel with the gate resistor between the gate terminal and the control terminal to allow leakage current to pass from the gate terminal through the one or more diodes. In some embodiments, the bias circuit may include a switch coupled with the one or more diodes to selectively couple the one or more diodes in parallel with the gate resistor when the transistor is off.

A semiconductor device according to an embodiment switches high-frequency signals and includes a semiconductor layer of a first conductivity type. A first layer of a second conductivity type is provided in the semiconductor layer. A second layer of the second conductivity type is provided in the semiconductor layer. A gate dielectric film is provided on the semiconductor layer, the first layer and the second layer. A gate electrode is provided on the gate dielectric film. The gate dielectric film includes a first portion and the semiconductor layer, and a second portion located at both side of the first portion-in a gate length direction of the gate electrode and being thicker than the first portion. At least a part of the second portion is located between the gate electrode and the first layer and between the gate electrode and the second layer.

A gate driver circuit drives a switching transistor. A variable current source generates a reference current configured to switch between a first current amount and a second current amount smaller than the first current amount. A current distribution circuit is configured to switch between a source enabled state in which a source current proportional to the reference current is sourced to a gate node of the switching transistor and a disabled state in which the source current is made equal to zero. A first transistor fixes the gate node of the switching transistor to a high voltage in an on-state of the first transistor. A second transistor fixes the gate node of the switching transistor to a low voltage in an on-state of the second transistor.

An element array circuit includes one or more first wirings, second wirings, impedance elements, one or more operational amplifiers, one or more first selectors, and one or more second selectors. The one or more first selectors each select one option from a first option group including a first option to apply a first potential to one of respective one or more first ends of the one or more first wirings and a second option to apply a second potential different from the first potential to the one of the one or more first ends. The one or more second selectors each select one option from a second option group including a third option to apply the first potential to one of respective one or more second ends of the first wiring(s) and a fourth option to apply the second potential to the one of the one or more second ends.

A solid state circuit includes a main and a floating circuit including: a first driver for generating a differential driver signal derived from a driver signal; a modulator configured for modulating a modulator signal with another signal to obtain a differential control signal; the floating circuit comprising: a floating power supply comprising at least one rectifier configured for generating a floating supply voltage (VDDF) and a floating ground voltage (VSSF) from the differential driver signal; a demodulator configured for demodulating the differential control signal and for passing the demodulated signal to an output switch; the output switch comprising a first output node and a second output node and at least one transistor configured for opening or closing an electrical path under control of the demodulated signal.

Methods, systems, and computer readable media described herein can be operable to facilitate transitioning a device from a first state to a second state. A switch described herein allows for the use of an electronic circuit to perform the toggle and persistence functions while simultaneously giving more flexibility to the industrial design and physical switch implementation. The switch allows this preserving of the state using only a toggle on a voltage and thus allowing for a hardware only solution. The switch described herein allows for the use of smaller and less complicated mechanical switches allowing for more compact industrial designs. The switch uses a programmable voltage reference as a 1 bit non-volatile memory cell that is programmed by means of a logic pulse to the device. This allows a software independent setting of the state of the privacy switch. This state will remain through power cycles.

A battery management circuit with a novel structure and a power storage device including the battery management circuit are provided. The power storage device includes a plurality of battery cells connected in series and a battery management circuit. The battery management circuit includes a voltage monitor circuit having a function of acquiring a voltage value between a pair of electrodes of any one of the battery cells. The voltage monitor circuit includes a multiplexer and a buffer circuit for outputting a signal for controlling the multiplexer. The multiplexer and the buffer circuit each include an n-channel transistor. The n-channel transistor is a transistor including an oxide semiconductor in a channel formation region. The multiplexer has a function of retaining an output voltage of the battery cell by setting the transistor in an off state.

A semiconductor device with a novel structure is provided. The semiconductor device includes a sensor, an amplifier circuit to which a sensor signal of the sensor is input, a sample-and-hold circuit that retains a voltage corresponding to an output signal of an amplifier input to the sample-and-hold circuit, an analog-to-digital converter circuit to which an output signal of the sample-and-hold circuit corresponding to the voltage is input, and an interface circuit. The interface circuit has a function of switching and controlling a first control period in which the sensor signal is input to the amplifier circuit and an output signal of the amplifier circuit is retained in the sample-and-hold circuit and a second control period in which a digital signal obtained by output of the voltage retained in the sample-and-hold circuit to the analog-to-digital converter circuit is output to the interface circuit. In the first control period, the analog-to-digital converter circuit is switched to stop output of the digital signal. The first control period is longer than the second control period.

A switch circuit includes first and second transistor stacks coupled in parallel between first and second ports. The first transistor stack includes a first plurality of transistors coupled in series between the first and second ports to provide a first variably-conductive path between the first and second ports. Each transistor of the first plurality of transistors has a gate terminal coupled to a first control terminal. The second transistor stack includes a second plurality of transistors coupled in series between the first and second ports to provide a second variably-conductive path between the first and second ports. Each transistor of the second plurality of transistors has a gate terminal coupled to a second control terminal. When implemented in a transceiver, first and second drivers are configured to simultaneously configure the first and second variably-conductive paths in a low-impedance state.

An electronic current-switching system comprising a driver unit and a current-switching device with one controlled transistor, a control unit coupled to said transistor, a power supply unit of the control unit and a digital communication bus transmitting to the control unit a first control signal of the driver unit. The power supply unit comprises: a transformer, an integrated circuit including a clock input coupled to a second output of the driver unit delivering a second control signal having the form of a pulsed signal with an adjustable duty cycle, and an output delivering to the transformer a primary voltage signal dependent on the second control signal, and a voltage divider bridge measuring the frequency-domain signal delivered by the transformer.