Embodiments of an oscillator and a method of operating an oscillator are disclosed. In an embodiment, an oscillator can include a ring oscillator core, a control circuit, and a timer that coordinates timing of the control circuit to avoid a current resulting from a voltage level associated with an output of the ring oscillator core during a startup and to allow the ring oscillator core to operate with a low startup current and a low operational power.

A signal conditioner for conditioning a differential oscillation signal into a compliant clock signal including first and second signal paths and a coincident gate. The first signal path toggles a first binary signal in response to the differential oscillation signal when the differential oscillation signal reaches a small amplitude level. The second signal path toggles a second binary signal in response to the differential oscillation signal only when the differential oscillation signal reaches a large amplitude level that is greater than the small amplitude level. The coincident gate toggles the clock signal high only when the first and second binary signals are both high, and toggles the clock signal low only when the first and second binary signals are both low. When the clock signal begins toggling, it may skip one or more cycles but is nonetheless compliant in terms of timing and amplitude.

Aspects of the disclosure include an apparatus that has a first clock generator and a second clock generator. The first clock generator is configured to drive a first circuit, causing the first circuit to (i) receive a signal corresponding to an audio input, and (ii) determine whether an energy level of the signal exceeds a predetermined threshold. The second clock generator is activated when the first circuit determines that the energy level of the signal exceeds the predetermined threshold. The second clock generator is configured to drive a second circuit, causing the second circuit to determine whether the signal matches a predetermined pattern. A third circuit is activated when the second circuit determines that the signal matches the predetermined pattern.

Aspects of the disclosure include an apparatus that has a first clock generator and a second clock generator. The first clock generator is configured to drive a first circuit, causing the first circuit to (i) receive a signal corresponding to an audio input, and (ii) determine whether an energy level of the signal exceeds a predetermined threshold. The second clock generator is activated when the first circuit determines that the energy level of the signal exceeds the predetermined threshold. The second clock generator is configured to drive a second circuit, causing the second circuit to determine whether the signal matches a predetermined pattern. A third circuit is activated when the second circuit determines that the signal matches the predetermined pattern.

The present disclosure discloses a quick-start clock system, which includes: a digital subsidiary circuit configured to output a digital control value; a phase-locked loop including a programmable voltage-controlled oscillator circuit and a frequency dividing circuit connected to each other and both connected to the digital subsidiary circuit, the programmable voltage-controlled oscillator circuit obtains the digital control value output, and output a clock signal according to the digital control value, the frequency dividing circuit performs a frequency dividing operation on the clock signal; and a crystal oscillator circuit connected to the phase-locked loop, which includes a crystal and an oscillation injecting circuit connected to the crystal, the oscillation injecting circuit converts the clock signal performed with the frequency dividing operation to a co-frequency fully differential signal, and inject the co-frequency fully differential signal into the crystal.

Embodiments of clock circuits disclosed herein include a crystal oscillator circuit, an injection oscillator coupled to kick-start the crystal oscillator circuit and a digital frequency calibration circuit coupled to recalibrate the injection oscillator. The crystal oscillator circuit is configured to generate a clock signal at a resonant frequency. The injection oscillator is coupled to supply an oscillation signal at an injection frequency to the crystal oscillator circuit to reduce a start-up time of the crystal oscillator circuit. The digital frequency calibration circuit is coupled to receive the resonant frequency and the injection frequency as inputs, and configured to supply a digital control signal to the injection oscillator to set the injection frequency of the injection oscillator substantially equal to the resonant frequency of the crystal oscillator circuit. Methods are provided herein to recalibrate the injection frequency of an injection oscillator over time, temperature and/or supply voltage.

Embodiments of clock circuits disclosed herein include a crystal oscillator circuit, an injection oscillator coupled to kick-start the crystal oscillator circuit and a digital frequency calibration circuit coupled to recalibrate the injection oscillator. The crystal oscillator circuit is configured to generate a clock signal at a resonant frequency. The injection oscillator is coupled to supply an oscillation signal at an injection frequency to the crystal oscillator circuit to reduce a start-up time of the crystal oscillator circuit. The digital frequency calibration circuit is coupled to receive the resonant frequency and the injection frequency as inputs, and configured to supply a digital control signal to the injection oscillator to set the injection frequency of the injection oscillator substantially equal to the resonant frequency of the crystal oscillator circuit. Methods are provided herein to recalibrate the injection frequency of an injection oscillator over time, temperature and/or supply voltage.

An oscillation circuit including a crystal interface, a crystal amplifier, a level detector, a timing circuit, and a controller. When activated, the crystal amplifier drives a crystal coupled to the crystal interface to establish oscillation, and the level detector indicates when a target amplitude is detected. The controller activates the crystal amplifier and uses the timing circuit and the level detector to measure a startup time of oscillation. The measured startup time is used in calculating a wake up time from a sleep mode in time to perform an operation at a scheduled time. The startup time may be adjusted or averaged and may be remeasured with temperature change. A method of minimizing startup time of a crystal oscillator includes measuring startup time for determining a delay value for programming a wakeup circuit. Robust startup settings may be used in the event of startup failure due to a sleepy crystal.

An oscillation circuit including a crystal interface, a crystal amplifier, a level detector, a timing circuit, and a controller. When activated, the crystal amplifier drives a crystal coupled to the crystal interface to establish oscillation, and the level detector indicates when a target amplitude is detected. The controller activates the crystal amplifier and uses the timing circuit and the level detector to measure a startup time of oscillation. The measured startup time is used in calculating a wake up time from a sleep mode in time to perform an operation at a scheduled time. The startup time may be adjusted or averaged and may be remeasured with temperature change. A method of minimizing startup time of a crystal oscillator includes measuring startup time for determining a delay value for programming a wakeup circuit. Robust startup settings may be used in the event of startup failure due to a sleepy crystal.

Techniques are described for fast wakeup of a crystal oscillator circuit. Embodiments operate in context of a crystal oscillator coupled with a phase-locked loop (PLL). For example, prior to entering sleep mode, embodiments retain a previously obtained coarse code used to coarse-tune a voltage controlled oscillator of the PLL. On wakeup, the PLL is configured in a chirp mode, in which the retained coarse code and a sweep voltage are used to generate a chirp signal at, or close to, a target stimulating frequency for the crystal oscillator. The chirp signal can be used to inject energy into the crystal oscillator, thereby causing the crystal oscillator to move from sleep mode to steady state oscillation relatively quickly.