A system and method for calibrating a Voltage-Controlled Oscillator (VCO) having both fine-tuning control and coarse-tuning control. The VCO frequency can vary monotonically with changes in each of one or more operational conditions. The calibration method determines the coarse-tuning control setting for the VCO at system start-up. The method comprises generating frequency characterization data, generating a polynomial function from the characterization data, calculating the fine-tuning control voltage based on the polynomial function and a measurement of the operational conditions, and sweeping through all the coarse-tuning control settings to determine the coarse-tuning control setting that generates the closest VCO frequency to a target frequency when using the calculated fine-tuning control voltage.

A system and method for calibrating a Voltage-Controlled Oscillator (VCO) having both fine-tuning control and coarse-tuning control. The VCO frequency can vary monotonically with changes in each of one or more operational conditions. The calibration method determines the coarse-tuning control setting for the VCO at system start-up. The method comprises generating frequency characterization data, generating a polynomial function from the characterization data, calculating the fine-tuning control voltage based on the polynomial function and a measurement of the operational conditions, and sweeping through all the coarse-tuning control settings to determine the coarse-tuning control setting that generates the closest VCO frequency to a target frequency when using the calculated fine-tuning control voltage.

In one form, an oscillator includes an oscillator core circuit and a dynamic gain control circuit. The oscillator core circuit is for connection to a frequency reference element and provides a first clock signal using a negative gain element having a gain determined by a gain control signal. The dynamic gain control circuit provides the gain control signal to set an absolute value of the gain to a first level during a startup state, and changes the gain control signal to reduce the absolute value of the gain to a second level lower than the first level after the first clock signal has reached a steady state.

In one form, an oscillator includes an oscillator core circuit and a dynamic gain control circuit. The oscillator core circuit is for connection to a frequency reference element and provides a first clock signal using a negative gain element having a gain determined by a gain control signal. The dynamic gain control circuit provides the gain control signal to set an absolute value of the gain to a first level during a startup state, and changes the gain control signal to reduce the absolute value of the gain to a second level lower than the first level after the first clock signal has reached a steady state.

A radio frequency (RF) signal can be produced with an RF frequency that is responsive to a frequency reference (FREF) clock. An inductive-capacitive (LC) tank oscillator circuit can generate the RF signal. A digital to time converter (DTC) circuit can operate, for a first edge of the FREF clock, in a baseline mode that has a first delay, and for a subsequent edge of the FREF clock, in a delay mode that introduces a second delay value to the FREF clock. A controller circuit can enable the LC-tank oscillator circuit in response to a first edge of the FREF clock and to set or increase the second delay value of the delay mode as a function of the frequency of the RF signal. A phase detector circuit can detect, for the subsequent edge of the FREF clock, a phase difference between the FREF clock and the RF signal.

A radio frequency (RF) signal can be produced with an RF frequency that is responsive to a frequency reference (FREF) clock. An inductive-capacitive (LC) tank oscillator circuit can generate the RF signal. A digital to time converter (DTC) circuit can operate, for a first edge of the FREF clock, in a baseline mode that has a first delay, and for a subsequent edge of the FREF clock, in a delay mode that introduces a second delay value to the FREF clock. A controller circuit can enable the LC-tank oscillator circuit in response to a first edge of the FREF clock and to set or increase the second delay value of the delay mode as a function of the frequency of the RF signal. A phase detector circuit can detect, for the subsequent edge of the FREF clock, a phase difference between the FREF clock and the RF signal.

Oscillator circuitry and methods of operation thereof are provided in which the oscillator circuitry includes at least a first oscillator, a second oscillator, and a lock detector. The first oscillator is configured to generate a first clock signal. The second oscillator is configured to generate a second clock signal. The lock detector is configured to detect a stable phase lock between the first clock signal and the second clock signal and to switch an output of the oscillator circuitry from the first clock signal to the second clock signal in response to detecting the stable phase lock.

Oscillator circuitry and methods of operation thereof are provided in which the oscillator circuitry includes at least a first oscillator, a second oscillator, and a lock detector. The first oscillator is configured to generate a first clock signal. The second oscillator is configured to generate a second clock signal. The lock detector is configured to detect a stable phase lock between the first clock signal and the second clock signal and to switch an output of the oscillator circuitry from the first clock signal to the second clock signal in response to detecting the stable phase lock.

An electronic device comprises an oscillator circuit portion comprising an inverter and a crystal oscillator connected between the input and output terminals of the inverter. An amplitude regulator circuit portion is arranged to supply a current to the inverter. The amplitude regulator monitors a voltage at the input of the inverter and varies the current supplied to the inverter in response to the monitored voltage. The amplitude regulator comprises a trimmable resistor arranged such that the voltage at the input of the inverter is set to an operating point when the supply current is equal to a threshold value, the operating point being at least partly determined by the selected resistance of the resistor. A current monitor is arranged to monitor the current supplied to the inverter during operation and to determine therefrom whether the voltage at the input terminal of the inverter is within a predetermined range.

An electronic device comprises an oscillator circuit portion comprising an inverter and a crystal oscillator connected between the input and output terminals of the inverter. An amplitude regulator circuit portion is arranged to supply a current to the inverter. The amplitude regulator monitors a voltage at the input of the inverter and varies the current supplied to the inverter in response to the monitored voltage. The amplitude regulator comprises a trimmable resistor arranged such that the voltage at the input of the inverter is set to an operating point when the supply current is equal to a threshold value, the operating point being at least partly determined by the selected resistance of the resistor. A current monitor is arranged to monitor the current supplied to the inverter during operation and to determine therefrom whether the voltage at the input terminal of the inverter is within a predetermined range.