Techniques for receiving control channel for multiple numerologies are disclosed. The UE receives a control channel by using a first numerology and receives a first data channel information by using a second numerology. The UE also receives a second data channel information by using the first numerology. Also, different numerologies and bandwidth portions are used for communicating data channel information and HARQ feedback respectively

Techniques for receiving control channel for multiple numerologies are disclosed. The UE receives a control channel by using a first numerology and receives a first data channel information by using a second numerology. The UE also receives a second data channel information by using the first numerology. Also, different numerologies and bandwidth portions are used for communicating data channel information and HARQ feedback respectively

An oscillation circuit includes a first oscillation circuit configured to oscillate a resonator to generate a first oscillation signal, a second oscillation circuit configured to generate a second oscillation signal, a frequency measurement circuit configured to measure a frequency of the second oscillation signal based on the first oscillation signal in a first period in which the first oscillation circuit is in operation, a holding circuit configured to hold a measurement result by the frequency measurement circuit in a second period in which the first oscillation circuit is not in operation, and an oscillation signal generation circuit configured to generate a third oscillation signal based on the second oscillation signal and the measurement result held in the holding circuit in a third period in which the first oscillation circuit starts up, wherein the third oscillation signal is supplied to the first oscillation circuit in the third period.

An oscillator circuit comprises a crystal oscillator arranged to generate an oscillation signal, a bias current generator arranged to supply a bias current to the crystal oscillator, and a feedback stage arranged to generate a feedback signal in response to an amplitude of the oscillation signal reaching an amplitude threshold. The bias current generator is arranged to: in response to a supply of power to the oscillator circuit being switched on, generate the bias current at an increasing level commencing from a first level; in response to the feedback signal, terminate the increasing; and during subsequent oscillation of the crystal oscillator, supply the bias current at a second level dependent on a final level of the bias current reached when the increasing is terminated.

An oscillator circuit comprises a crystal oscillator arranged to generate an oscillation signal, a bias current generator arranged to supply a bias current to the crystal oscillator, and a feedback stage arranged to generate a feedback signal in response to an amplitude of the oscillation signal reaching an amplitude threshold. The bias current generator is arranged to: in response to a supply of power to the oscillator circuit being switched on, generate the bias current at an increasing level commencing from a first level; in response to the feedback signal, terminate the increasing; and during subsequent oscillation of the crystal oscillator, supply the bias current at a second level dependent on a final level of the bias current reached when the increasing is terminated.

The present disclosure discloses a quick-start clock system, which includes: a digital subsidiary circuit configured to output a digital control value; a phase-locked loop including a programmable voltage-controlled oscillator circuit and a frequency dividing circuit connected to each other and both connected to the digital subsidiary circuit, the programmable voltage-controlled oscillator circuit obtains the digital control value output, and output a clock signal according to the digital control value, the frequency dividing circuit performs a frequency dividing operation on the clock signal; and a crystal oscillator circuit connected to the phase-locked loop, which includes a crystal and an oscillation injecting circuit connected to the crystal, the oscillation injecting circuit converts the clock signal performed with the frequency dividing operation to a co-frequency fully differential signal, and inject the co-frequency fully differential signal into the crystal.

A crystal oscillator circuit that can be controlled for fast start-up and for efficient operation is disclosed. The control includes adjusting a voltage applied to a body terminal of a transistor in order to control the amplification of the crystal oscillator. The amplification can be increased, relative to a motional resistance of the crystal oscillator, at start-up to reduce a start-up time necessary for oscillation. The amplification can also be decreased in order to maintain oscillation after start-up more efficiently. In some implementations, the transistor for control is a fully depleted silicon on insulator (FDSOI) transistor that accommodates a wide range of body bias voltages.

A crystal oscillator circuit that can be controlled for fast start-up and for efficient operation is disclosed. The control includes adjusting a voltage applied to a body terminal of a transistor in order to control the amplification of the crystal oscillator. The amplification can be increased, relative to a motional resistance of the crystal oscillator, at start-up to reduce a start-up time necessary for oscillation. The amplification can also be decreased in order to maintain oscillation after start-up more efficiently. In some implementations, the transistor for control is a fully depleted silicon on insulator (FDSOI) transistor that accommodates a wide range of body bias voltages.

An oscillator start-up circuit and methodology for oscillator start-up is disclosed. The circuit includes a reference bias switch coupled to a reference node and a load node of a transconductor of an oscillator. The reference bias switch is responsive to a control signal for start-up of the oscillator and operable to close at a first time prior to start-up of the oscillator to maintain a voltage at the reference node equal to a voltage at the load node prior to application of bias to the transconductor. The reference bias switch is further operable to open at a second time subsequent to the first time. In one embodiment, a separate reference bias voltage is applied to a reference node of the transconductor.

An oscillator start-up circuit and methodology for oscillator start-up is disclosed. The circuit includes a reference bias switch coupled to a reference node and a load node of a transconductor of an oscillator. The reference bias switch is responsive to a control signal for start-up of the oscillator and operable to close at a first time prior to start-up of the oscillator to maintain a voltage at the reference node equal to a voltage at the load node prior to application of bias to the transconductor. The reference bias switch is further operable to open at a second time subsequent to the first time. In one embodiment, a separate reference bias voltage is applied to a reference node of the transconductor.