A crystal oscillator includes a crystal resonator; an inverting amplifier configured to be coupled between a pair of excitation electrodes of the crystal resonator; and a control circuit configured to initiate an alarm and raise gain of the inverting amplifier in a case where an index value for representing oscillation amplitude of the crystal resonator in an oscillation state is equal to or lower than a reference value.

A digital frontend circuit for a radio frequency (RF) comprises a digital predistortion (DPD) block, a plurality of sub-sample delay elements, and a selection circuit. The DPD block for computing predistorted transmit signals according to a Volterra series approximation model. The DPD block has an input for receiving input samples at a first sample rate and an output for providing the predistorted transmit signals at the first sample rate. Each of the sub-sample delay elements provides a delay to an input sample as specified by the Volterra series approximation model, where each of the delays is based on a fraction of the first sample rate. The selection circuit selects one of the plurality of sub-sample delay elements in response to a selection signal from the digital predistortion block. The selection signal for selecting a delay as specified by the Volterra series approximation model.

Device and a method of configuring a voltage level shifter is disclosed. The device includes a traditional level shifter circuit (TLSC), a first control circuit (FCC) cross-coupled to a second control circuit (SCC). The FCC is coupled to receive an inverse of an input at a first input node and provide a first output at a first output node. The SCC is coupled to receive the input at a second input node and provide a second output at a second output node and the TLSC is configured to provide an output at an output node in response to the first output received at the first output node and the second output received at the second output node. A first power source is configured to provide a first power supply voltage to the TLSC, the FCC and the SCC. The output is latched to track the input. The TLSC, the FCC and the SCC are coupled to a ground reference node.

A semiconductor integrated circuit of embodiments includes a first MOS transistor configured to control conduction and non-conduction between a reference voltage point and a node, a second MOS transistor connected to the first MOS transistor via the node and configured to apply a voltage equal to or lower than a withstand voltage of the first MOS transistor to the node, a third MOS transistor configured to receive supply of a second voltage higher than the first voltage, and output an output signal of a signal level corresponding to a voltage range of the second voltage, and a switch circuit configured to make a voltage of the node a fixed voltage when the first MOS transistor is in an OFF state.

A circuit includes: an oscillator configured to generate an oscillation clock signal; an NMOS transistor having a source connected with a power terminal of the oscillator, and a drain connected with a first power supply line to which a first power supply voltage is supplied; an operational amplifier configured to control a gate voltage of the NMOS transistor based on a voltage of the power terminal of the oscillator; and a charge pump.

The charge pump is configured to use the oscillation clock signal or a clock signal generated from the oscillation clock signal to boost the first power supply voltage and generate a boosted power supply voltage, and to supply the boosted power supply voltage to the power terminal of the operational amplifier.

A circuit includes: an oscillator configured to generate an oscillation clock signal; an NMOS transistor having a source connected with a power terminal of the oscillator, and a drain connected with a first power supply line to which a first power supply voltage is supplied; an operational amplifier configured to control a gate voltage of the NMOS transistor based on a voltage of the power terminal of the oscillator; and a charge pump.

The charge pump is configured to use the oscillation clock signal or a clock signal generated from the oscillation clock signal to boost the first power supply voltage and generate a boosted power supply voltage, and to supply the boosted power supply voltage to the power terminal of the operational amplifier.

An apparatus for performing level shift control in an electronic device includes an input stage positioned in a level shifter of the electronic device, and an output stage positioned in the level shifter and coupled to the input stage through a set of intermediate nodes. The input stage is arranged for receiving at least one input signal of the level shifter through at least one input terminal of the input stage and controlling voltage levels of the set of intermediate nodes according to the at least one input signal. The input stage includes a hybrid current control circuit coupled to the at least one input terminal and arranged for performing current control for the input stage. The hybrid current control circuit is equipped with multiple sets of parallel paths for controlling currents passing through the set of intermediate nodes, respectively, each set may include two or more paths in parallel.

A half bridge GaN circuit is disclosed. The circuit includes a low side circuit, which has a low side switch, a low side switch driver configured to drive the low side switch, a first level shift circuit configured to receive a first level shift signal, and a second level shift circuit configured to generate a second level shift signal. The half bridge GaN circuit also includes a high side circuit, which has a high side switch configured to be selectively conductive according to a voltage level of a received high side switch signal, and a high side switch driver configured to generate the high side switch signal in response to the level shift signals. A transition in the voltage of the high side switch signal causes the high side switch driver to prevent additional transitions of the voltage level of the high side switch signal for a period of time.

An oscillator circuit has a reconfigurable oscillator amplifier. The reconfigurable oscillator amplifier is used to be coupled to a resonant circuit in parallel. The reconfigurable oscillator amplifier supports different circuit configurations for different operation modes, respectively. The reconfigurable oscillator amplifier has at least one circuit component shared by the different circuit configurations. The reconfigurable oscillator amplifier employs one of the different circuit configurations under one of the different operation modes.

An oscillator circuit has a reconfigurable oscillator amplifier. The reconfigurable oscillator amplifier is used to be coupled to a resonant circuit in parallel. The reconfigurable oscillator amplifier supports different circuit configurations for different operation modes, respectively. The reconfigurable oscillator amplifier has at least one circuit component shared by the different circuit configurations. The reconfigurable oscillator amplifier employs one of the different circuit configurations under one of the different operation modes.