Patent classifications
H03L5/00
Oscillator Circuit with Bias Current Generator
An oscillator circuit comprises a crystal oscillator arranged to generate an oscillation signal, a bias current generator arranged to supply a bias current to the crystal oscillator, and a feedback stage arranged to generate a feedback signal in response to an amplitude of the oscillation signal reaching an amplitude threshold. The bias current generator is arranged to: in response to a supply of power to the oscillator circuit being switched on, generate the bias current at an increasing level commencing from a first level; in response to the feedback signal, terminate the increasing; and during subsequent oscillation of the crystal oscillator, supply the bias current at a second level dependent on a final level of the bias current reached when the increasing is terminated.
Oscillator Circuit with Bias Current Generator
An oscillator circuit comprises a crystal oscillator arranged to generate an oscillation signal, a bias current generator arranged to supply a bias current to the crystal oscillator, and a feedback stage arranged to generate a feedback signal in response to an amplitude of the oscillation signal reaching an amplitude threshold. The bias current generator is arranged to: in response to a supply of power to the oscillator circuit being switched on, generate the bias current at an increasing level commencing from a first level; in response to the feedback signal, terminate the increasing; and during subsequent oscillation of the crystal oscillator, supply the bias current at a second level dependent on a final level of the bias current reached when the increasing is terminated.
Current balancing, current sensor, and phase balancing apparatus and method for a voltage regulator
Apparatuses and methods of current balancing, current sensing and phase balancing, offset cancellation, digital to analog current converter with monotonic output using binary coded input (without binary to thermometer decoder), compensator for a voltage regulator (VR), etc. In one example, a plurality of inductors is coupled to a capacitor and a load; a plurality of bridges, each of which is coupled to a corresponding inductor from the plurality of inductors; and a plurality of current sensors, each of which is coupled to a bridge to sense current through a transistor of the bridge
Current balancing, current sensor, and phase balancing apparatus and method for a voltage regulator
Apparatuses and methods of current balancing, current sensing and phase balancing, offset cancellation, digital to analog current converter with monotonic output using binary coded input (without binary to thermometer decoder), compensator for a voltage regulator (VR), etc. In one example, a plurality of inductors is coupled to a capacitor and a load; a plurality of bridges, each of which is coupled to a corresponding inductor from the plurality of inductors; and a plurality of current sensors, each of which is coupled to a bridge to sense current through a transistor of the bridge
Oscillator circuit with bias current generator
An oscillator circuit comprises a crystal oscillator arranged to generate an oscillation signal, a bias current generator arranged to supply a bias current to the crystal oscillator, and a feedback stage arranged to generate a feedback signal in response to an amplitude of the oscillation signal reaching an amplitude threshold. The bias current generator is arranged to: in response to a supply of power to the oscillator circuit being switched on, generate the bias current at an increasing level commencing from a first level; in response to the feedback signal, terminate the increasing; and during subsequent oscillation of the crystal oscillator, supply the bias current at a second level dependent on a final level of the bias current reached when the increasing is terminated.
Oscillator circuit with bias current generator
An oscillator circuit comprises a crystal oscillator arranged to generate an oscillation signal, a bias current generator arranged to supply a bias current to the crystal oscillator, and a feedback stage arranged to generate a feedback signal in response to an amplitude of the oscillation signal reaching an amplitude threshold. The bias current generator is arranged to: in response to a supply of power to the oscillator circuit being switched on, generate the bias current at an increasing level commencing from a first level; in response to the feedback signal, terminate the increasing; and during subsequent oscillation of the crystal oscillator, supply the bias current at a second level dependent on a final level of the bias current reached when the increasing is terminated.
Circuit and method for controlling a crystal oscillator
A crystal oscillator circuit that can be controlled for fast start-up and for efficient operation is disclosed. The control includes adjusting a voltage applied to a body terminal of a transistor in order to control the amplification of the crystal oscillator. The amplification can be increased, relative to a motional resistance of the crystal oscillator, at start-up to reduce a start-up time necessary for oscillation. The amplification can also be decreased in order to maintain oscillation after start-up more efficiently. In some implementations, the transistor for control is a fully depleted silicon on insulator (FDSOI) transistor that accommodates a wide range of body bias voltages.
Circuit and method for controlling a crystal oscillator
A crystal oscillator circuit that can be controlled for fast start-up and for efficient operation is disclosed. The control includes adjusting a voltage applied to a body terminal of a transistor in order to control the amplification of the crystal oscillator. The amplification can be increased, relative to a motional resistance of the crystal oscillator, at start-up to reduce a start-up time necessary for oscillation. The amplification can also be decreased in order to maintain oscillation after start-up more efficiently. In some implementations, the transistor for control is a fully depleted silicon on insulator (FDSOI) transistor that accommodates a wide range of body bias voltages.
CLOCK SIGNAL GENERATING CIRCUIT
A clock signal generating circuit includes a detecting circuit configured to generate a first voltage based on first and second clock signals and adjust a level of the first voltage in response to first and second setup voltages and a resistance variable code, a comparing circuit configured to compare the first voltage and a reference voltage and output a check signal according to a comparison result, a code generating circuit configured to perform a first modulation operation for determining the resistance variable code in response to the check signal and perform a second modulation operation for determining a control code in response to the check signal, and an oscillator configured to adjust an amplitude of the first and second clock signals in response to the control code, and output the first and second clock signals having the adjusted amplitude.
OSCILLATION CIRCUIT WITH IMPROVED FAILURE DETECTION
Apparatus and methods for non-invasively monitoring an oscillation signal in an effort to provide a more reliable oscillation signal. An example oscillation circuit generally includes an oscillator configured to generate an oscillation signal, the oscillator comprising an oscillator core circuit for coupling to a resonator and configured to generate the oscillation signal to enable the resonator to resonate and an adjustable current source coupled to the oscillator core circuit and configured to control an amplitude of the oscillation signal; a first automatic gain control (AGC) circuit having an input coupled to an output of the oscillator and having an output coupled to a control input of the adjustable current source; a second AGC circuit configured to replicate the first AGC circuit; and logic having a first input coupled to the output of the first AGC circuit and having a second input coupled to an output of the second AGC circuit.