A data compression method and a data decompression method are provided. The method includes pruning an original data including a plurality of weight parameters, identifying at least one first weight parameter of which at least one first value is not changed by the pruning, among multiple weight parameters included in the pruned original data, and obtaining a first index data including location information of the at least one first weight parameter of which the at least one first value is not changed, identifying at least one second weight parameter of which at least one second value is changed by the pruning, among the multiple weight parameters included in the pruned original data, and substituting the at least one second weight parameter of which the at least one second value is changed with a don't care parameter.

Methods, devices and systems enhance compression and decompression of data blocks of data values by selecting the best suited compression method and device among two or a plurality of compression methods and devices, which are combined together and which said compression methods and devices compress effectively data values of particular data types; said best suited compression method and device is selected using as main selection criterion the dominating data type in a data block by predicting the data types within said data block.

Mechanisms to reduce noise and/or energy consumption in PAM communication systems, utilizing conditional symbol substitution in each burst interval of a multi-data lane serial data bus.

A processing device is provided which includes a plurality of encoders each configured to compress a portion of data using a different compression algorithm. The processing device also includes one or more processors configured to cause an encoder, of the plurality of encoders, to compress the portion of data when it is determined that the portion of data, which is compressed by another encoder configured to compress the portion of data prior to the encoder in an encoder hierarchy, is not successfully compressed according to a compression metric by the other encoder in the encoder hierarchy. The one or more processors are also configured to prevent the encoder from compressing the portion of data when it is determined that the portion of data is successfully compressed according to the compression metric by the other encoder in the encoder hierarchy.

In connection with compression of an input stream, multiple portions of the input stream are searched against previously received portions of the input stream to find any matches of character strings in the previously received portions of the input stream. In some cases, matches of longer character strings, as opposed to shorter character strings, can be selected for inclusion in an encoded stream that is to be compressed. Delayed selection can occur whereby among multiple matches, a match that is longer can be selected for inclusion in the encoded stream and non-selected a character string match is reverted to a literal. A search engine that is searching an input stream to identify a repeat pattern of characters can cease to search for characters that were included in the selected character string match.

The present disclosure relates to an encoder and an encoding method thereof, as well as a decoder and a decoding method thereof, which can be used to reduce the number of wires necessary for data transmission and transmit more data at a faster speed with the same number of wires, thereby improving the efficiency of data transmission. The encoder may comprises two input terminals configured to receive two input signals simultaneously, each input terminal comprises a wire identifying a positive voltage and a wire identifying a negative voltage; and a plurality of output terminals, wherein each output terminal comprises a wire identifying a positive voltage and a wire identifying a negative voltage, a combination of the two input signals corresponds to one of the plurality of output terminals, and the output terminal to which the current combination of the two input signals corresponds is configured to output signals through the two wires of the output terminal.

The present disclosure relates to an encoder and an encoding method thereof, as well as a decoder and a decoding method thereof, which can be used to reduce the number of wires necessary for data transmission and transmit more data at a faster speed with the same number of wires, thereby improving the efficiency of data transmission. The encoder may comprises two input terminals configured to receive two input signals simultaneously, each input terminal comprises a wire identifying a positive voltage and a wire identifying a negative voltage; and a plurality of output terminals, wherein each output terminal comprises a wire identifying a positive voltage and a wire identifying a negative voltage, a combination of the two input signals corresponds to one of the plurality of output terminals, and the output terminal to which the current combination of the two input signals corresponds is configured to output signals through the two wires of the output terminal.

Disclosed herein is a system (10) for transmitting a data stream (12). The system (10) is configured to receive the data stream (12). The data stream (12) carries a plurality of orders that are destined for a market (24) configured for electronic trading. The system (10) is configured to transmit the data stream (12) carrying the plurality of orders. The system (10) is configured to process at least the plurality of orders (12) to determine trading risk information (14) indicative of trading risk. The system (10) is configured to determine if the trading risk indicated by the trading risk information (14) satisfies a trading risk condition (16). The system (10) is configured to cease transmitting the data stream (12) carrying the plurality of orders if the trading risk condition is determined to be satisfied and commenced transmitting another data stream (18) destined for the electronic market. Also disclosed herein is a method for transmitting a data stream (12).

Disclosed herein are techniques to provide forward error correction for a high-speed interconnect symbol stream, such as, DisplayPort. The symbol stream may be split into FEC blocks and parity bits generated for each of the FEC blocks. The parity bits may be interleaved, encoded, and transmitted over an interconnect along with the symbol stream to provide forward error correction for the symbol stream.

An analog-to-digital converter (ADC) includes a digital-to-analog converter (DAC) that has a configurable capacitor array. Based on measurements of differential nonlinearity (DNL) and/or integral nonlinearity (INL) error by an external test computer system, an order for use of the DAC's capacitors can be determined so as to reduce DNL error aggregation, also called INL. The DAC includes a switch matrix that can be programmed by programming data supplied by the test computer system.