H03M7/00

CLOCKLESS PROGRAMMABLE PULSE WIDTH GENERATION USING AN INVERSE CHAOTIC MAP
20220416769 · 2022-12-29 ·

Technologies are provided for generation of programmable pulse signals using inverse chaotic maps, without reliance on a clocking signal. Some embodiments of the technologies include an apparatus that can receive a sequence of bits having a defined number of bits, where the sequence of bits represent a desired continuous pulse signal having a programmable width in time-domain. The apparatus can also can receive a precursor continuous pulse signal having an arbitrary width in time-domain that fits within the dynamic range of the apparatus. The apparatus can generate the desired continuous pulse signal by transforming the precursor continuous pulse signal using the sequence of bits and an inverse chaotic map.

Method of reducing conduction loss and switching loss applied in driving circuit and driving circuit using the same

A method, which is applied in a driving circuit including an analog-to-digital convertor (ADC) and a switching circuit including an inductor and coupled to a load, includes steps of: performing an analog-to-digital conversion on a load voltage of the load at a first rate; and producing at least a current pulse flowing through the inductor at a second rate. Wherein, each current pulse among the at least a current pulse is accomplished within a second cycle corresponding to the second rate, all of the at least a current pulse are accomplished within a first cycle corresponding to the first rate, and a first length of the first cycle is longer than twice of a second length of the second cycle.

Variational dropout with smoothness regularization for neural network model compression
11811429 · 2023-11-07 · ·

A method, computer program, and computer system is provided for compressing a deep neural network model. Weight coefficients associated with a deep neural network are quantize and entropy-coded. The quantized and entropy-coded weight coefficients are locally smoothed. The smoothed weight coefficients are compressed based on applying a variational dropout to the weight coefficients.

Decoding method, decoding device, and readable storage medium

The present disclosure provides a decoding method, a decoding device, and a readable storage medium, which include performing an exclusive-or logic operation on a first identification bit and a second identification bit in a first bit stream to obtain a first operation result, and processing the first bit stream according to the first operation result to obtain a second bit stream; performing the exclusive-or logic operation on a third identification bit and a fourth identification bit in the second bit stream to obtain a second operation result, and processing the second bit stream according to the second operation result to obtain a third bit stream; and deleting two specific bits in the third bit stream to obtain a decoded bit.

Method and device for processing data overflow in decompression process

A method for processing data overflow in a decompression process, includes: decompressing an original text, and detecting whether a data overflow event occurs in the decompression process; in response to detecting the data overflow event, storing first data obtained by decompression in a host cache into a target memory, and closing a data read-in port of a decoding engine; decompressing data which is being decompressed in the decoding engine to obtain second data, and storing the second data into a cache of the decoding engine; calculating a position of the decompressed data in the original text; obtaining, on the basis of the position, data which is not decompressed in the original text, re-decompressing the data which is not decompressed to obtain third data, and storing the second data into the target memory; and splicing the first data, the second data, and the third data to obtain complete decompressed data.

System and method for data compression using genomic encryption techniques

A system and method for data compression with genomic encryption, which uses frequency analysis on data blocks within an input data stream to produce a prefix table, representing a first layer of transformation, and which applies a Burrow's-Wheeler transform (BWT) to the data inside the prefix table, representing a second layer of transformation, and which compresses the transformed data. In some implementations, the system and method may further include applying the BWT to a conditioned stream of genomic data, wherein the conditioned stream of genomic data is accompanied by an error stream comprising the differences between the original data and the encrypted data.

Text compression with predicted continuations

A method for text compression comprises recognizing a prefix string of one or more text characters preceding a target string of a plurality of text characters to be compressed. The prefix string is provided to a natural language generation (NLG) model configured to output one or more predicted continuations each having an associated rank. If the one or more predicted continuations include a matching predicted continuation relative to the next one or more text characters of the target string, the next one or more text characters are compressed as an NLG-type compressed representation. If no predicted continuations match the next one or more text characters of the target string, a longest matching entry in a compression dictionary is identified. The next one or more text characters of the target string are compressed as a dictionary-type compressed representation that includes the dictionary index value of the longest matching entry.

Three-dimensional data encoding method, three-dimensional data decoding method, three-dimensional data encoding device, and three-dimensional data decoding device

A three-dimensional data encoding method includes: generating an N-ary tree structure of three-dimensional points included in three-dimensional data, where N is an integer greater than or equal to 2; generating first encoded data by encoding a first branch using a first encoding process, the first branch having, as a root, a first node included in a first layer that is one of layers included in the N-ary tree structure; generating second encoded data by encoding a second branch using a second encoding process different from the first encoding process, the second branch having, as a root, a second node included in the first layer and different from the first node; and generating a bitstream including the first encoded data and the second encoded data.

Data compression based on co-clustering of multiple parameters for AI training

Co-clustering of at least some parameters is employed to reduce data transferred between edge and cloud resources. Single-parameter cluster information, including cluster counts, for each of two or more parameters of interest is accessed. Each parameter may represent a time series of numeric values sent from an IoT unit to an edge device. A co-clustering ratio is determined for each unique parameter pair. The co-clustering ratio indicates whether the number of clusters produced by a co-clustering algorithm applied to a group of parameters is less than the number of clusters required to represent the parameters without co-clustering. Co-cluster groups may be identified based on the cluster ratios. For each co-cluster group, the co-clustering algorithm may be invoked to produce compressed encodings of numeric value tuples. The compressed encoding is then transmitted to a cloud computing resource and decoded into a tuple of surrogate values.

Data compressor logic circuit

A compressor includes a logic circuit having transistors of a first channel type to receive a plurality of bit signals, and transistors of a second channel type, different from the first channel type, to receive the plurality of bit signals. The transistors of the first channel type are configured to generate an XOR logic output based on the plurality of bit signals, and the transistors of the second channel type are configured to generate, substantially simultaneous with the generation of the XOR logic output, an XNOR logic output based on the plurality of bit signals. The compressor includes NAND gates to receive multiplicand and multiplier bit signals.