H03M13/00

Serial Communications Module With CRC

A circuit with an interface, a transmit data register coupled to the interface, a storage device coupled to the transmit data register and including a plurality of storage locations, each storage location adapted to store a data unit, and a serial register coupled between the storage device and an output. The circuit also includes a CRC generation circuit having an input coupled between an output of the transmit data register and the storage device. The CRC generation circuit includes a first CRC generation block for providing a CRC in response to an X-bit data unit and an X-bit polynomial and a second CRC generation block with a collective X-bit input for providing a CRC in response to an X-bit data unit and a 2X-bit polynomial in a single clock cycle and a 2X-bit data unit and a 2X-bit polynomial in two clock cycles.

ERROR RATE MEASURING APPARATUS AND CODEWORD ERROR DISPLAY METHOD
20230069842 · 2023-03-09 ·

An error rate measuring apparatus includes: an operation unit that sets a codeword length, an FEC symbol length, and an FEC symbol error threshold in accordance with a communication standard of a device under test W; error counting means for counting FEC symbol error detected at one FEC symbol interval and an uncorrectable codeword; a display unit that identifies and displays bit string data according to presence or absence of the FEC symbol error in FEC symbol length units based on a counting result; and display control means for performing display control by setting one zone of a display area of identification display as one FEC symbol length, matching a zone length of a horizontal axis of the display area with one codeword length, and performing line feed in codeword length units.

Simple parity-check bit computation for polar codes

Methods and systems described herein are directed to encoding information bits for transmission. The methods can include receiving a set of information bits (900) and determining a set of parity check bits (910). The set of information bits is concatenated with the set of parity check bits (920), and the information bits are polar encoded into a set of information bits and frozen bits (930). The encoded set of information bits is transmitted to a wireless receiver (940). In particular embodiments, each parity check bit in the set of parity check bits is the binary sum of the values of all bits in front of it. Other embodiments include generating a set of parity check bits based on a systematic block code on the least reliable bits of the set of information bits. The methods and systems described herein may be applied to 3GPP 5G mobile communication systems.

NLOS wireless backhaul downlink communication

A method for communicating over a wireless backhaul channel comprising generating a radio frame comprising a plurality of time slots, wherein each time slot comprises a plurality of symbols in time and a plurality of sub-carriers in a system bandwidth, broadcasting a broadcast channel signal comprising a transmission schedule to a plurality of remote units in a number of consecutive sub-carriers centered about a direct current (DC) sub-carrier in at least one of the time slots in the radio frame regardless of the system bandwidth, and transmitting a downlink (DL) control channel signal and a DL data channel signal to a first of the remote units, wherein the DL data channel signal is transmitted by employing a single carrier block transmission scheme comprising a Discrete Fourier Transform (DFT) spreading for frequency diversity.

Data processing device and data processing method

The present technology relates to a data processing device and a data processing method which can ensure high communication quality in data transmission using LDPC codes. In group-wise interleaving, an LDPC code having a code length N of 64800 bits and a coding rate r of 11/15 is interleaved in a unit of a bit group of 360 bits. In group-wise deinterleaving, a sequence of bit groups of the LDPC code which has been subjected to the group-wise interleaving is returned to an original sequence. The present technology can be applied to, for example, a case in which data transmission is performed using LDPC codes.

Reduced complexity polar encoding and decoding
11476875 · 2022-10-18 · ·

Systems, methods, and instrumentalities are described herein that may be used for reduced complexity polar encoding and decoding. There may be a set of encoding nodes to be used for polar encoding. An encoding node may be associated with a bit index and/or a relaxation level. A relaxation attribute may be selected for the encoding node. A relaxation group may be determined based on the relaxation attributes. The relaxation group may include two encoding nodes associated with consecutive bit indexes, an initial relaxation level, and the first relaxation attribute. A final relaxation level may be determined. Relaxation may be performed on the encoding nodes in the relaxation group. For example, an XOR operation between the encoding nodes may be omitted. Relaxation may be performed on the encoding nodes associated with each relaxation level up to the final relaxation level.

Method and apparatus for LDPC transmission over a channel bonded link

A particular overall architecture for transmission over a bonded channel system consisting of two interconnected MoCA (Multimedia over Coax Alliance) 2.0 SoCs (Systems on a Chip) and a method and apparatus for the case of a “bonded” channel network. With a bonded channel network, the data is divided into two segments, the first of which is transported over a primary channel and the second of which is transported over a secondary channel.

Transmitting apparatus and interleaving method thereof

A transmitting apparatus is provided. The transmitting apparatus includes: an encoder configured to perform a low-density parity check (LDPC) encoding on input bits using a parity check matrix to generate an LDPC codeword comprising information word bits and parity bits; an interleaver configured to interleave the LDPC codeword; and a modulator configured to map the interleaved LDPC codeword onto a modulation symbol, wherein the modulator is further configured to map a bit included in a predetermined bit group from among a plurality of bit groups constituting the LDPC codeword onto a predetermined bit of the modulation symbol.

Method for auto-detection of WLAN packets using STF
11637572 · 2023-04-25 · ·

A method of auto-detection of WLAN packets includes selecting a first Golay sequence from a first pair of Golay complementary sequences associated with first packet type, each Golay sequence of the first pair of Golay complementary sequences being zero correlation zone (ZCZ) sequences with each Golay sequence of a second pair of Golay complementary sequences associated with a second packet type, and transmitting a wireless packet carrying a short training field (STF) that includes one or more instances of the first Golay sequence.

Transmitter and repetition method thereof

A transmitter is provided. The transmitter includes: a low density parity check (LDPC) encoder configured to encode input bits to generate an LDPC codeword including the input bits and parity bits; a repeater configured to select at least a part of bits constituting the LDPC codeword and add the selected bits after the input bits; and a puncturer configured to puncture at least a part of the parity bits.