A millimeter-wave phase array system may include massive heterodyne transceivers as its building elements. A transceiver of each element may include an IQ image rejection heterodyne transmitter and a receiver. Each transmitter may include a single DAC, a Tx I channel, and a Tx Q channel. Each receiver may include an Rx I channel, an Rx Q channel, and a single ADC. For Tx IQ image rejection calibration, amplitude and phase offsets are determined, using both the Tx I and Tx Q channels from a first element and using only one of the Rx I or Rx Q channel from a second element. The IQ channel imbalances are compensated using the offsets in analog domain. A similar procedure is used for Rx IQ image rejection calibration with alternated signal path enabling. A frequency response variation of an RF front end is detected with a single path Tx/Rx channel setup.

An apparatus is comprised of a processor, a fast-locking Phase-Locked Loop Waveform Generator (PLLWG), an amplifier circuit, and a voltage controlled oscillator (VCO). The processor generates data program signals to program the PLLWG and generates a trigger command signal instructing the PLLWG to generate an analog tuning signal. The PLLWG, coupled to the processor, generates the analog tuning signal based on the trigger command signal. The amplifier circuit, coupled to the PLLWG, receives the analog tuning signal, amplify the analog tuning signal, and generates a control voltage. The VCO, coupled to the amplifier circuit, receives the control voltage and amplifies the control voltage to generate an amplified Radio Frequency (RF) channel frequency signal.

An antenna structure includes a ground element, a first radiation element, a second radiation element, a third radiation element, and a dielectric substrate. The first radiation element has a feeding point. The first radiation element is coupled to a first grounding point on the ground element. The second radiation element is coupled to the feeding point. The third radiation element is coupled to a second grounding point on the ground element. The third radiation element is adjacent to the second radiation element. The ground element, the first radiation element, the second radiation element, and the third radiation element are all disposed on the dielectric substrate.

Disclosed is a filter bank module having a substrate, an antenna port terminal, and a filter bank die. The filter bank die is fixed to the substrate and includes a first acoustic wave (AW) filter having a first antenna terminal coupled to the antenna port terminal and a first filter terminal, and a second AW filter having a second filter terminal, and a second antenna terminal coupled to the first antenna terminal to effectively diplex signals that pass through the first AW filter and the second AW filter.

System, methods, and computer-readable media for validating and committing a shared O-RU configuration via a shared O-RU Operator. The shared O-RU Operator validates a partitioned configuration received from a tenant operator, with the ability to indicate to the tenant operator that the partitioned configuration is conformant to agreed-upon sharing rules and then commits the shared configuration to the shared O-RU. The shared O-RU operator shares the outcome of the commit operation to the tenant operator via defined operational-data that can be read by the tenant operator. A single radio in O-RAN is shared by multiple different operators and enables a neutral host to deploy a radio unit and then have that attached to different operators networks.

A radio frequency (RF) generator incorporates an automatic level control (ALC) circuit to control the output level of the RF signal where the ALC circuit implements synchronized ADC sampling, pulse sample indexing, gated accumulation to enable fast ALC loop control, especially for pulse-modulated RF signals. In other embodiments, the ALC circuit implements multi-level control for multi-level RF signals. In this manner, the RF generator uses the ALC circuit to generate an RF signal having a constant power level for RF signals having any pulse shape or output levels. In other embodiments, a clock generation circuit in an impedance matching network synchronizes a slave clock to a clock signal of the RF signal when the load impedance is resistive only or when the clock signal of the RF signal has a given phase condition.

An access point includes a WiFi chipset, a first radio that is coupled to the WiFi chipset and that is selectively coupled to a first radiating element through one of a first filter or a second filter, and a second radio that is coupled between the WiFi chipset and a second radiating element.

An acoustic wave filter includes a first signal terminal, an antenna terminal, a ladder-type filter connected between the first signal terminal and the antenna terminal and including one or more serial resonators and one or more parallel resonators connected in a ladder shape, and a capacitor part and an inductor part which are connected in series between the first signal terminal and a reference potential.

A multiplexer includes a transmission filter and a reception filter connected to a common terminal, a first inductor connected to the common terminal, and a multilayer substrate on which the transmission filter and the reception filter are mounted and which includes dielectric layers. The transmission filter includes a parallel-arm resonator connected to a path between the common terminal and a transmission terminal and a parallel-arm terminal, and a second inductor connected to the parallel-arm terminal and ground. The first inductor includes a first coil pattern on a first dielectric layer and a second coil pattern on a second dielectric layer. The second inductor includes a third coil pattern on the first dielectric layer and that is magnetically coupled to the first coil pattern. The inductance value of the second coil pattern is greater than that of the first coil pattern.

A method of manufacturing an RF switch includes adding a first mutual inductance portion to a first self-inductance portion of a first transmission line; and adding a second mutual inductance portion to a second self-inductance portion of a second transmission line, wherein values of the first and second mutual inductance portions and values of the first and second self-inductance portions equalize an impedance difference between the first transmission line and the second transmission line.