A shoe may include an upper sole and an outer sole. In one state of the shoe, the upper sole is conductively connected to the outer sole. In another state of the shoe, the upper sole is electrically insulated from the outer sole. The shoe may be changed between these states.

A shoe may include an upper sole and an outer sole. In one state of the shoe, the upper sole is conductively connected to the outer sole. In another state of the shoe, the upper sole is electrically insulated from the outer sole. The shoe may be changed between these states.

A static resistant fan apparatus, comprising: a conductive shaft; a first conductive fan blade connected to the conductive shaft and extending away from the conductive shaft; a second conductive fan blade connected to the conductive shaft and extending away from the conductive shaft opposite to the first conductive fan blade; a conductive support structure surrounding the conductive shaft, wherein an inner edge of the support structure is spaced apart from the conductive shaft a distance; and a conductive ground pass coupled between the conductive shaft and the support structure and spanning the distance, wherein the conductive shaft, the conductive support structure, and the conductive ground pass provide a path to ground for the first conductive and the second conductive fan blades.

The present disclosure provides a display substrate, including: a display area and a bonding area positioned on a side of the display area, the bonding area includes a plurality of bonding sub-areas arranged at intervals, the bonding sub-areas are arranged along a direction in which an edge of the display area extends and configured for bonding a chip-on-film, where a first antistatic layer is further arranged on the bonding area, at least a part of the first antistatic layer is positioned between adjacent ones of the bonding sub-areas, and the first antistatic layer is electrically coupled to a reference signal terminal. The present disclosure further provides a display device.

The present disclosure provides a motherboard and a manufacturing method for the motherboard, the motherboard includes at least one display area, a periphery area surrounding the at least one display area, a plurality of test terminals, an electrostatic discharge line, a plurality of resistors and at least one thin film transistor. The plurality of test terminals are respectively electrically connected to the electrostatic discharge line through the plurality of resistors. At least one of the plurality of resistors includes an inorganic nonmetal trace. The at least one thin film transistor includes an active layer, and the inorganic nonmetal trace includes a same semiconductor matrix material as the active layer of the at least one thin film transistor.

A gear includes at least one gear tooth and an electrode mounted to the at least one gear tooth along a contact face of the at least one gear tooth. A flowable dielectric material is positioned on the contact face of the at least one gear tooth. The dielectric material is structured to be movable along the contact face of the at least one gear tooth responsive to a gravity force.

A gear includes at least one gear tooth and an electrode mounted to the at least one gear tooth along a contact face of the at least one gear tooth. A flowable dielectric material is positioned on the contact face of the at least one gear tooth. The dielectric material is structured to be movable along the contact face of the at least one gear tooth responsive to a gravity force.

Disclosed is a static eliminator having an offset voltage reducing structure capable of improving antistatic performance for a charged body by reducing an ion offset voltage. The present static eliminator comprises a static eliminator body having an air passage through which high-pressure air is supplied, a plurality of discharge structures installed at the lower end of the static eliminator body to supply the high-pressure air passing through the air passage, and generating positive/negative ions by discharging using the applied high voltage, and an offset voltage reduction unit having a plurality of openings formed to allow the positive/negative ions and high-pressure air to pass therethrough, and installed to cover at least some of the plurality of discharge structures.

Disclosed is a static eliminator having an offset voltage reducing structure capable of improving antistatic performance for a charged body by reducing an ion offset voltage. The present static eliminator comprises a static eliminator body having an air passage through which high-pressure air is supplied, a plurality of discharge structures installed at the lower end of the static eliminator body to supply the high-pressure air passing through the air passage, and generating positive/negative ions by discharging using the applied high voltage, and an offset voltage reduction unit having a plurality of openings formed to allow the positive/negative ions and high-pressure air to pass therethrough, and installed to cover at least some of the plurality of discharge structures.

An air stream controller and a system for static charge reduction comprising such air stream controller are disclosed. The air stream controller comprises an enclosed hollow body having a first surface and a second surface, wherein, an opening is on the first surface facing an incoming tubing of a device for static charge reduction for receiving air stream from the device for static charge reduction, wherein an outgoing tubing of the device for static charge reduction is attached onto the second surface of the enclosed hollow body for discharging the air stream. A technical solution to more effectively prevent the “leaking of air stream passage” can be achieved through the design of a multi-holes structure at the air passage to more broadly expand its air sucking area coverage without increasing the original suction power.