Patent classifications
H10N69/00
Quantum computing devices with Majorana Hexon qubits
Various embodiments of a modular unit for a topologic qubit and of scalable quantum computing architectures using such modular units are disclosed herein. For example, one example embodiment is a modular unit for a topological qubit comprising 6 Majorana zero modes (MZMs) on a mesoscopic superconducting island. These units can provide the computational MZMs with protection from quasiparticle poisoning. Several possible realizations of these modular units are described herein. Also disclosed herein are example designs for scalable quantum computing architectures comprising the modular units together with gates and reference arms (e.g., quantum dots, Majorana wires, etc.) configured to enable joint parity measurements to be performed for various combinations of two or four MZMs associated with one or two modular units, as well as other operations on the states of MZMs.
Superconducting current control system
One example includes a superconducting current control system. The system includes an inductive coupler comprising a load inductor and a control inductor. The inductive coupler can be configured to inductively provide a control current from the control inductor to a superconducting circuit device based on a load current being provided through the load inductor. The system also includes a current control element comprising a superconducting quantum interference device (SQUID) array comprising a plurality of SQUIDs. The current control element can be coupled to the inductive coupler to control an amplitude of the load current through the load inductor, and thus to control an amplitude of the control current to the superconducting circuit device.
TWO-DIMENSIONAL SCALABLE SUPERCONDUCTING QUBIT STRUCTURE AND METHOD FOR CONTROLLING CAVITY MODE THEREOF
The present disclosure provides a two-dimensional scalable superconducting qubit structure and a method for controlling a cavity mode thereof. The two-dimensional scalable superconducting qubit structure includes: a superconducting qubit chip comprising a plurality of two-dimensionally distributed and scalable qubits; a capacitor part of each of the qubits has at least five arms distributed two-dimensionally, two of the at least five arms in each qubit are respectively connected with a read coupling circuit and a control circuit, and the other at least three arms are coupled with adjacent qubits through a coupling cavity.
Controlling a Tunable Floating Coupler Device in a Superconducting Quantum Processing Unit
In a general aspect, a superconducting quantum processing unit includes a first qubit device, a second qubit device, and a tunable floating coupler device coupled between the first and second qubit devices. Values of a coupling strength of the first and second qubit devices at a plurality of operating points of the tunable floating coupler device are measured. The operating points correspond to respective values of a magnetic flux applied to the tunable floating coupler device. Based on the measured values of the coupling strength, a parking value of the magnetic flux is identified. The parking value of the magnetic flux corresponds to a magnitude of the coupling strength being less than or equal to a threshold value; the threshold value is associated with a target gate fidelity for the superconducting quantum processing unit.
Superconducting interposer for the transmission of quantum information for quantum error correction
A system for transmission of quantum information for quantum error correction includes an ancilla qubit chip including a plurality of ancilla qubits, and a data qubit chip spaced apart from the ancilla qubit chip, the data qubit chip including a plurality of data qubits. The system includes an interposer coupled to the ancilla qubit chip and the data qubit chip, the interposer including a dielectric material and a plurality of superconducting structures formed in the dielectric material. The superconducting structures enable transmission of quantum information between the plurality of data qubits on the data qubit chip and the plurality of ancilla qubits on the ancilla qubit chip via virtual photons for quantum error correction.
Quantum processor design to increase control footprint
A quantum processor includes: a first chip comprising a qubit array, in which a plurality of qubits within the qubit array define an enclosed region on the first chip, in which each qubit of the plurality of qubits that define the enclosed region is arranged to directly electromagnetically couple to an adjacent qubit of the plurality of qubits that define the enclosed region, and in which each qubit of the qubit array comprises at least two superconductor islands, and a second chip bonded to the first chip, the second chip including one or more qubit control elements, in which the qubit control elements are positioned directly over the enclosed region of the first chip.
Coupled-line bus to suppress classical crosstalk for superconducting qubits
A system includes a first quantum circuit plane that includes a first qubit, a second qubit and a third qubit. A coupled-line bus is coupled between the first qubit and the second qubit. A second circuit plane is connected to the first quantum circuit plane, comprising a control line coupled to the third qubit. The control line and the coupled-line bus are on different planes and crossing over each other, and configured to mitigate cross-talk caused by the crossing during signal transmission.
PARAMETRIC AMPLIFIER AND USES THEREOF
A parametric amplifier for amplifying an input signal includes a resonator comprising a Josephson junction. The Josephson junction comprises a first superconductor component, a second superconductor component and a semiconductor component. The semiconductor component is configured to enable coupling of the first and second superconductor components. The parametric amplifier further comprises a gate electrode configured to apply an electrostatic field to the semiconductor component of the Josephson junction for tuning the parametric amplifier. Such parametric amplifiers are useful for amplifying signals in the microwave frequency range. Tuning the junction by electrostatic gating may allow for improved scalability compared to tuning using magnetic flux. Also provided are the use of the parametric amplifier to amplify a signal; and a method of amplifying a signal.
High-Temperature Superconducting Seebeck Nano-scale THz Antenna
An antenna comprising; a substrate; a continuous film of yttrium barium copper oxide (YBCO) disposed on the substrate having first and second regions, wherein the first region has a first oxygen doping level and wherein the second region has a second oxygen doping level that is different from the first oxygen doping level; a nano-scale conductive structure, shaped to resonate at a terahertz (THz) frequency, disposed on a boundary between the first and second regions; and a conductive path electrically connected to the first and second regions and to the conductive structure such that induced current in the structure due to incoming THz radiation heats the boundary thereby creating a thermal gradient, which results in the generation of Seebeck effect voltage.
Low footprint resonator in flip chip geometry
A device includes a first substrate having a principal surface; a second substrate having a principal surface, in which the first substrate is bump-bonded to the second substrate such that the principal surface of the first substrate faces the principal surface of the second substrate; a circuit element having a microwave frequency resonance mode, in which a first portion of the circuit element is arranged on the principal surface of the first substrate and a second portion of the circuit element is arranged on the principal surface of the second substrate; and a first bump bond connected to the first portion of the circuit element and to the second portion of the circuit element, in which the first superconductor bump bond provides an electrical connection between the first portion and the second portion.