Various embodiments herein relate to electrochromic devices, methods of fabricating electrochromic devices, and apparatus for fabricating electrochromic devices. In a number of cases, the electrochromic device may be fabricated to include a particular counter electrode material. The counter electrode material may include a base anodically coloring material. The counter electrode material may further include one or more halogens. The counter electrode material may also include one or more additives.

The invention provides a process for forming crack-free dielectric films on a substrate. The process comprises the application of a dielectric precursor layer of a thickness from about 0.3 μm to about 1.0 μm to a substrate. The deposition is followed by low temperature heat pretreatment, prepyrolysis, pyrolysis and crystallization step for each layer. The deposition, heat pretreatment, prepyrolysis, pyrolysis and crystallization are repeated until the dielectric film forms an overall thickness of from about 1.5 μm to about 20.0 μm and providing a final crystallization treatment to form a thick dielectric film. The process provides a thick crack-free dielectric film on a substrate, the dielectric forming a dense thick crack-free dielectric having an overall dielectric thickness of from about 1.5 μm to about 20.0 μm.

The present invention relates to a polarized light emissive device and a method for its manufacture comprising a plural of fluorescent semiconductor quantum rods, and to a preparation thereof. The invention further relates to a use of the polarized light emissive device in optical devices, and to an optical device comprising the polarized light emissive device.

Described is a micro-lattice damping material and a method for repeatable energy absorption. The micro-lattice damping material is a cellular material formed of a three-dimensional interconnected network of hollow tubes. This material is operable to provide high damping, specifically acoustic, vibration or shock damping, by utilizing the energy absorption mechanism of hollow tube buckling, which is rendered repeatable by the micro-lattice architecture.

The present invention is to provide a microstructure capable of improving the withstand voltage of an insulating substrate while securing fine conductive paths, a multilayer wiring board, a semiconductor package, and a microstructure manufacturing method. The microstructure of the present invention has an insulating substrate having a plurality of through holes, and conductive paths consisting of a conductive material containing metal filling the plurality of through holes, in which an average opening diameter of the plurality of through holes is 5 nm to 500 nm, an average value of the shortest distances connecting the through holes adjacent to each other is 10 nm to 300 nm, and a moisture content is 0.005% or less with respect to the total mass of the microstructure.

Provided is a zinc-based plated steel sheet having a post-treated coating filmed thereon including: a steel sheet; a zinc plated layer formed on the steel sheet; and a post-treated coating formed on the plated layer, wherein the atomic ratio (O/M) of oxygen (O) to metals (M) contained in the post-treated coating is greater than 2 and less than 20, and a method for post-treating a zinc-based plated steel sheet. According to this, the zinc-based plated steel sheet having the post-treated coating formed thereon has the effects excellent in lubricity, weldability, adhesiveness, film-removing property and paintability. As the method of post-treating a zinc-based plated steel sheet of the present invention employs a simple coating method irrespective of the kind of plating layer, the process is simple and economical and the process operation cost is low.

Provided is a zinc-based plated steel sheet having a post-treated coating filmed thereon including: a steel sheet; a zinc plated layer formed on the steel sheet; and a post-treated coating formed on the plated layer, wherein the atomic ratio (O/M) of oxygen (O) to metals (M) contained in the post-treated coating is greater than 2 and less than 20, and a method for post-treating a zinc-based plated steel sheet. According to this, the zinc-based plated steel sheet having the post-treated coating formed thereon has the effects excellent in lubricity, weldability, adhesiveness, film-removing property and paintability. As the method of post-treating a zinc-based plated steel sheet of the present invention employs a simple coating method irrespective of the kind of plating layer, the process is simple and economical and the process operation cost is low.

The substrate for a printed circuit board according to an embodiment of the present invention includes a base film having insulating properties, and a metal layer stacked on at least one surface of the base film, in which the base film includes a portion where a transition metal in group 10 of the periodic table is present. The transition metal in group 10 is preferably nickel or palladium. The portion where the transition metal in group 10 is present preferably includes a region having an average thickness of 500 nm and extending from an interface with the metal layer.

The substrate for a printed circuit board according to an embodiment of the present invention includes a base film having insulating properties, and a metal layer stacked on at least one surface of the base film, in which the base film includes a portion where a transition metal in group 10 of the periodic table is present. The transition metal in group 10 is preferably nickel or palladium. The portion where the transition metal in group 10 is present preferably includes a region having an average thickness of 500 nm and extending from an interface with the metal layer.

A method of fabricating an interposer includes: providing a carrier substrate; forming a unit redistribution layer on the carrier substrate, the unit redistribution layer including a conductive via plug and a conductive redistribution line; and removing the carrier substrate from the unit redistribution layer. The formation of the unit redistribution layer includes: forming a first photosensitive pattern layer including a first via hole pattern; forming a second photosensitive pattern layer including a second via hole pattern and a redistribution pattern on the first photosensitive pattern layer; at least partially filling insides of the first via hole pattern, the second via hole pattern, and the redistribution pattern with a conductive material; and performing planarization to make a top surface of the unit redistribution layer flat. According to the method, no undercut occurs under a conductive structure and there are no bubbles between adjacent conductive structures, thus device reliability is enhanced and pattern accuracy is realized.