Integrated circuits may include memory element circuitry. The memory element circuitry may include multiple dual-port memory elements that are controlled to effectively form a multi-port memory element having multiple read and write ports. A respective bank of dual-port memory elements may be coupled to each write port. Write data may be received concurrently over one or more of the write ports and stored on the banks. Switching circuitry may be coupled between the banks and the read ports of the memory element circuitry. The switching circuitry may be controlled using read control signals generated by logic XOR-based control circuitry. The control circuitry may include dual-port memory elements that store addressing signals associated with the write data. The read control signals may control the switching circuitry to selectively route the most-recently written data to corresponding read ports during a data read operation.

The description generally relates to a system designed to synchronize the rendering of a media file between a master device and a sister device. The system is designed so that a media file is simultaneously rendered on a master device and a sister device beginning from identical temporal starting points.

The application discloses a buffer device and a method for controlling data access to an internal memory. The buffer device has a central buffer module coupled to a memory interface to receive a command/address signal via a command/address channel. The central buffer module is configured to detect whether a destination address of the received command/address signal is within a predefined address space, and generate a security read/write signal when the command/address signal is within the predefined address space. The buffer device further has a data buffer module coupled between the memory interface and a memory module to buffer data therebetween. The data buffer module is configured to store reference data, compare the buffered data with the reference data in response to the security read/write signal, and determine whether or not to restrict exchange of the buffered data between the memory module and the memory interface.

In one embodiment, a storage system configured for reading a file written to a plurality of tape media includes at least two tape drives and a read/write control. The read/write control is configured to load a tape medium into a tape drive, and read metadata from the loaded tape medium and determine from the metadata whether the tape medium is a parent tape medium or a child tape medium for the file. The read/write control is also configured to retrieve ID information on the parent tape medium from the metadata saved in the child tape medium in response to a determination that the loaded tape medium is a child tape medium, and load the parent tape medium identified by the retrieved ID information into another tape drive. Moreover, the read/write control is configured to read a written first file part based on metadata saved in the loaded parent tape medium.

A USB smart hub may provide enhanced battery charging, data storage security, vendor matching, device authentication, data capture/debug, and role switching. The smart hub may include an upstream port, a plurality of downstream ports, a processor, and a memory coupled to the processor for storing USB host stack code and configuration parameters. The smart hub may include a USB hub core having a core to implement a standard USB hub interface. The smart hub may include a plurality of 2:1 multiplexors coupled between the downstream ports, the core downstream ports, and the processor. The processor may control the 2:1 multiplexors. The processor may be configured to detect when a USB device is coupled to a downstream port and to run the USB host stack code and to enumerate the USB device. The processor may provide enhanced features based on the configuration parameters.

An electronic device is provided. The electronic device includes a motion sensor and a processor. The motion sensor is configured to perform a sampling at a sampling rate. In each sampling, the motion sensor generates a sample by sampling an angular velocity or an acceleration of the electronic device. The motion sensor is further configured to store each sample in a buffer of the motion sensor. The processor is coupled to the motion sensor and is configured to perform a polling at a polling rate. In each polling, the processor fetches a plurality of the samples from the buffer. The processor is further configured to perform a numerical integration based on the fetched samples.

An apparatus, method and computer program in a distributed cluster storage network comprises storage control nodes to write data to storage on request from a host; a forwarding layer at a first node to forward data to a second node; a buffer controller at each node to allocate buffers for data to be written; and a communication link between the buffer controller and the forwarding layer at each node to communicate a constrained or unconstrained status indicator of the buffer resource to the forwarding layer. A mode selector selects a constrained mode of operation requiring allocation of buffer resource at the second node and communication of the allocation before the first node can allocate buffers and forward data, or an unconstrained mode of operation granting use of a predetermined resource credit provided by the second to the first node and permitting forwarding of a write request with data.

A data transfer system is disclosed, which comprises a serial controller and a switch device. The switch device includes a first serial port, a second serial port, and a transferring unit. The first serial port and the second serial port are individually configured to transmit a first type signal to the transferring unit. The transferring unit selectively switches a transmission of the first type signal from either the first serial port or the second serial port to the serial controller. The first serial port and the second serial port are individually configured to transmit a second type signal to the serial controller, wherein the first type signal is faster than the second type signal in transmission rate.

A computer-implemented method includes writing, by a producer, data to one or more buffers. The one or more buffers include a plurality of cells and together form a circular buffer, and an input cursor indicates which cell of the plurality of cells the producer writes to. The method further includes reading, by a consumer, data from the one or more buffers, where an output cursor indicates which cell of the plurality of cells the consumer reads from. It is detected that the consumer is overrun by the producer. A throughput of the consumer is compared to a throughput of the producer, responsive to detecting that the consumer is overrun by the producer. The output cursor is synchronized to a new position, by a computer processor, where the new position is selected based on comparing the throughput of the consumer to the throughput of the producer.

A serial peripheral interface of an integrated circuit includes: a first transfer pin for receiving an instruction and an address; and a clock pin for inputting a plurality of timing pulses each having a rising edge and a falling edge. After the first transfer pin receives the instruction, the integrated circuit receives the address through the first transfer pin in continuity with the receipt of the instruction. The first transfer pin receives the instruction at either of the rising edges and the falling edges of the timing pulses and receives the address at both of the rising edges and falling edges of the timing pulses.