A method includes providing a substrate including mandrels of a first material positioned on an underlying layer. Each of the mandrels includes a first sidewall and an opposing second sidewall. The method further includes forming sidewall spacers made of a second material and including a first sidewall spacer abutting each respective first sidewall and a second sidewall spacer abutting each respective second sidewall. The mandrels extend above top surfaces of the sidewall spacers. The method also includes forming first capped sidewall spacers by depositing a third material on the first sidewall spacers without depositing on the second sidewall spacers, forming second capped sidewall spacers by depositing a fourth material on the second sidewall spacers without depositing on the first sidewall spacers, and selectively removing at least one of the first material, the second material, the third material, and the fourth material to uncover an exposed portion of the underlying layer.

A method of reducing junction resistance variation for junctions in quantum information processing devices fabricated using two-step deposition processes. In one aspect, a method includes providing a dielectric substrate (208), forming a first resist layer (210) on the dielectric substrate, forming a second resist layer (212) on the first resist layer, and forming a third resist layer (214) on the second resist layer. The first resist layer includes a first opening (216) extending through a thickness of the first resist layer, the second resist layer includes a second opening (218) aligned over the first opening and extending through a thickness of the second resist layer, and the third resist layer includes a third opening (220) aligned over the second opening and extending through a thickness of the third resist layer.

A method for making LNO film, including the steps of identifying a substrate, identifying a deposition target, placing the substrate and deposition target in a deposition environment, evolving target material into the deposition environment, and depositing evolved target material onto the substrate to yield an LNO film. The deposition environment defines a temperature of between 500 degrees Celsius and 750 degrees Celsius and a pressure of about 10.sup.−6 Torr. A seed or buffer layer may be first deposited onto the substrate, wherein the seed layer is about 30 mole percent gold and about 70 LiNbO.sub.3.

The present disclosure provides a flexible workpiece pedestal capable of tilting a workpiece support surface. The workpiece pedestal further includes a heater mounted on the workpiece support surface. The heater includes a plurality of heating sources such as heating coils. The plurality of heating sources in the heater allows heating the workpiece at different temperatures for different zones of the workpiece. For example, the workpiece can have a central zone heated by a first heating coil, a first outer ring zone that is outside of the central zone heated by a second heating coil, a second outer ring zone that is outside of the first outer ring zone heated by a third heating coil. By using the tunable heating feature and the tilting feature of the workpiece pedestal, the present disclosure can reduce or eliminate the shadowing effect problem of the related workpiece pedestal in the art.

A module for operating a carrier of one or more substrates to be treated in a vacuum deposition method includes a frame provided with a plate receiving, on a first side, an electronic assembly comprising radio transmitter/receiver electronics, a processor card, motor controller electronics and a battery for supplying power to the module. The processor card has a program memory with a program for controlling the motor controller electronics according to data received from a remote apparatus provided with a radio transmitting/receiving device for communicating with the module's radio transmitter/receiver electronics and, on a second side, a device for operating the carrier, which device is provided with a first motor for rotating the carrier about a first axis parallel to the plate and with a second motor for rotating the carrier about a second axis perpendicular to the plate.

A sputtering apparatus includes a base on which a substrate is mounted, an annular member disposed at an outer periphery of the base to surround a side surface and a backside of the substrate without in contact with the substrate, and an edge cover that covers an outer edge of an upper surface of the substrate mounted on the base. The annular member has a first surface facing the backside of the substrate mounted on the base with a gap, a second surface facing the side surface of the substrate mounted on the base with a gap, and a tapered surface formed at a corner portion between the first surface and the second surface.

A method of fabricating a circuit element, such as a quantum computing circuit element, including obtaining a lithography mask write file that includes mask information characterizing one or more mask features, obtaining a uniformity function that is configured to modify the mask information to compensate for a non-uniform deposition process, applying the uniformity function to the lithography mask write to obtain a modified lithography mask write file, and performing lithography as directed by the modified lithography mask write file.

A method of reducing junction resistance variation for junctions in quantum information processing devices fabricated using two-step deposition processes. In one aspect, a method includes providing a dielectric substrate, forming a first resist layer on the dielectric substrate, forming a second resist layer on the first resist layer, and forming a third resist layer on the second resist layer. The first resist layer includes a first opening extending through a thickness of the first resist layer, the second resist layer includes a second opening aligned over the first opening and extending through a thickness of the second resist layer, and the third resist layer includes a third opening aligned over the second opening and extending through a thickness of the third resist layer.

A coated article is described herein that may comprise a substrate and an optical coating. The substrate may have a major surface comprising a first portion and a second portion. A first direction that is normal to the first portion of the major surface may not be equal to a second direction that is normal to the second portion of the major surface. The optical coating may be disposed on at least the first portion and the second portion of the major surface. The coated article may exhibit at the first portion of the substrate and at the second portion of the substrate hardness of about 8 GPa or greater at an indentation depth of about 50 nm or greater as measured on the anti-reflective surface by a Berkovich Indenter Hardness Test.

A method of fabricating a circuit element, such as a quantum computing circuit element, including obtaining a lithography mask write file that includes mask information characterizing one or more mask features, obtaining a uniformity function that is configured to modify the mask information to compensate for a non-uniform deposition process, applying the uniformity function to the lithography mask write to obtain a modified lithography mask write file, and performing lithography as directed by the modified lithography mask write file.