C23C16/042

METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE AND PATTERN FORMATION METHOD

In a pattern formation method, a photoresist layer is formed over a substrate by combining a first precursor and a second precursor in a vapor state to form a photoresist material. The first precursor is an organometallic having a formula M.sub.aR.sub.bX.sub.c, where M is one or more selected from the group consisting of Sn, Bi, Sb, In, and Te, R is an alkyl group that is substituted by different EDG and/or EWG, X is a halide or sulfonate group, and 1≤a≤2, b≥1, c≥1, and b+c≤4. The second precursor is water, an amine, a borane, and/or a phosphine. The photoresist material is deposited over the substrate, and selectively exposed to actinic radiation to form a latent pattern, and the latent pattern is developed by applying a developer to the selectively exposed photoresist layer to form a pattern.

SELECTIVE DEPOSITION OF CARBON ON PHOTORESIST LAYER FOR LITHOGRAPHY APPLICATIONS
20220005688 · 2022-01-06 ·

Embodiments disclosed within include a method for etching a hardmask layer includes forming a photoresist layer comprising an organometallic material on a hardmask layer comprising a metal-containing material, exposing the photoresist layer to ultraviolet radiation through a mask having a selected pattern, removing un-irradiated areas of the photoresist layer to pattern the photoresist layer, forming a passivation layer comprising a carbon-containing material selectively on a top surface of the patterned photoresist layer, including selectively depositing passivation material over a top surface of a patterned photoresist layer trimming undesired portions of the passivation material, and etching the hardmask layer exposed by the patterned photoresist layer having the passivation layer formed thereon.

Fine shadow mask assembly for an active matrix organic light emitting diode (AMOLED) and fine shadow mask assembly manufacturing method
11217749 · 2022-01-04 ·

An active matrix organic light emitting diode shadow mask assembly includes a shadow mask frame, longitudinal supporting bars, transverse spacer plates, shadow mask plates. The longitudinal supporting bars are disposed on the shadow mask frame at intervals. The transverse spacer plates are disposed on circular rod portions of the longitudinal supporting bars, are supported by the longitudinal supporting bars, are arranged at intervals. The shadow mask plates are disposed on the transverse spacer plates, are supported by the longitudinal supporting bars, parallel the transverse spacer plates. Each transverse spacer plate is located under a gap between adjacent shadow mask plates, contacts the shadow mask plates, covers the gap. The transverse spacer plates directly contacting the shadow mask plates effectively cover the gaps between the shadow mask plates, effectively prevent organic material in a later process from leaking through the shadow mask plates, dropping on to a lower glass substrate.

METHOD OF QUALITY DETERMINING OF DEPOSITION MASK, METHOD OF MANUFACTURING DEPOSITION MASK, METHOD OF MANUFACTURING DEPOSITION MASK DEVICE, METHOD OF SELECTING DEPOSITION MASK, AND DEPOSITION MASK
20230329077 · 2023-10-12 · ·

A method of quality determination of a deposition mask according to the present disclosure includes: a measuring step that measures a dimension X1 from a P1 point to a Q1 point, and a dimension X2 from a P2 point to a Q2 point; and a determining step that determines a quality of a deposition mask, based on the dimension X1 and the dimension X2 measured in the measuring step.

METHOD FOR DEPOSITING A SILICON GERMANIUM LAYER ON A SUBSTRATE
20230326750 · 2023-10-12 ·

A method heteroepitaxially deposits a silicon germanium layer on a substrate. The silicon germanium layer has a composition Si.sub.1-xGe.sub.x, where 0.01≤x≤1. The substrate is a silicon single crystal wafer or a silicon-on-insulator wafer. The method includes: providing a mask layer atop the substrate; removing the mask layer in an edge region of the substrate to provide access to an annular-shaped free surface of the substrate in the edge region of the substrate surrounding a remainder of the mask layer; depositing an edge reservoir consisting of a relaxed or partially relaxed silicon germanium layer atop the annular-shaped free surface of the substrate; removing the remainder of the mask layer; and depositing the silicon germanium layer atop the substrate and atop the edge reservoir, the silicon germanium layer contacting an inner lateral surface of the edge reservoir.

Seal plates for chemical vapor infiltration and deposition chambers
11788186 · 2023-10-17 · ·

A seal plate disposable between a pair of preforms for chemical vapor infiltration is disclosed. The seal plate may include a plurality of first channels that extend completely through the seal plate and that are located between an inner annulus and outer annulus of the seal plate. The seal plate may further include a plurality of second channels that also extend completely through the seal plate and that are located also between an inner annulus and outer annulus. The first channels may differ from the second channels in at least one respect (e.g., the first channels may be of a different width than the second channels). The first channels may provide an inlet for the chemical vapor infiltration of the preform, while the second channels may provide an outlet for the chemical vapor infiltration of the preform.

METAL MASK MATERIAL, METHOD FOR MANUFACTURING SAME, AND METAL MASK

A metal mask material for OLED use reduced in amount warpage due to etching, a method for manufacturing the same, and a metal mask are provided. The metal mask material and metal mask of the present invention contain, by mass %, Ni: 35.0 to 37.0% and Co: 0.00 to 0.50%, have a balance of Fe and impurities, have thicknesses of 5.00 μm or more and 50.00 μm or less, and have amounts of warpage defined as maximum values in amounts of rise of four corners of a square shaped sample of the metal mask material of 100 mm sides when etching the sample from one surface until the thickness of the sample becomes ⅖ and placing the etched sample on a surface plate of 5.0 mm or less.

MASK ASSEMBLY MANUFACTURING APPARATUS AND MASK ASSEMBLY MANUFACTURING METHOD USING THE SAME
20230323527 · 2023-10-12 ·

A mask assembly manufacturing apparatus for manufacturing a mask assembly, including a frame through which an opening is defined and a support bar disposed above the frame, includes a stage on which the frame is placed, an alignment unit disposed above the stage and including magnetic units, and a fixing unit disposed between the stage and the alignment unit and including a first sub-fixing unit which fixes one end of the support bar and a second sub-fixing unit which fixes another end of the support bar and spaced apart from the first sub-fixing unit in a first direction. The magnetic units includes first magnetic units disposed above the support bar and second magnetic units disposed above the support bar, spaced apart from the first magnetic units in a second direction perpendicular to the first direction, and having a polarity opposite to a polarity of the first magnetic units.

SUBSTRATE PROCESSING METHOD AND SELECTIVE DEPOSITION METHOD USING THE SAME

There is provided a substrate processing method. The method includes providing a substrate having a first surface area and a second surface area having a different surface state than that of the first surface area, exposing the substrate to a substrate surface treatment composition containing a deposition inhibitor, and exposing the substrate to a post-treatment composition containing HF.

WAFER EDGE DEPOSITION FOR WAFER LEVEL PACKAGING

Semiconductor processing methods and apparatuses are provided. Some methods include providing a first wafer to a processing chamber, the first wafer having a thickness, a beveled edge, a first side, and a plurality of devices formed in a device area on the first side, the device area having an outer perimeter, depositing an annular ring of material on the first wafer, the annular ring of material covering a region of the beveled edge and the outer perimeter of the device area, and having an inner boundary closer to the center point of the first wafer than the outer perimeter, bonding a second substrate to the plurality of devices and to a portion of the annular ring of material, and thinning the thickness of the first wafer.