C23C16/24

CHEMISTRIES FOR ETCHING MULTI-STACKED LAYERS

Methods for fabricating a 3D NAND flash memory are disclosed. The method includes the steps of forming a hardmask pattern on the hardmask layer, and using the hardmask pattern to form apertures in the alternating layers by selectively plasma etching the alternating layers versus the hardmask layer using a hydrofluorocarbon etching gas selected from the group consisting of 1,1,1,3,3,3-hexafluoropropane (C.sub.3H.sub.2F.sub.6), 1,1,2,2,3,3-hexafluoropropane (iso-C.sub.3H.sub.2F.sub.6), 1,1,1,2,3,3,3-heptafluoropropane (C.sub.3HF.sub.7), and 1,1,1,2,2,3,3-heptafluoropropane (iso-C.sub.3HF.sub.7), wherein the first etching layer comprises a material different from that of the second etching layer.

METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE, AND SEMICONDUCTOR MANUFACTURING APPARATUS
20170365465 · 2017-12-21 ·

There is provided a method of manufacturing a semiconductor device, which includes: forming a silicon film inside a recess formed in a surface of a workpiece by supplying a film forming gas containing silicon to the workpiece; subsequently, supplying a process gas, which includes a halogen gas for etching the silicon film and a roughness suppressing gas for suppressing roughening of a surface of the silicon film after being etched by the halogen gas, to the workpiece; etching the silicon film formed on a side wall of the recess to enlarge an opening width of the recess by applying thermal energy to the process gas and activating the process gas; and subsequently, filling silicon into the recess by supplying the film forming gas to the workpiece and depositing silicon on the silicon film remaining in the recess.

METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE, AND SEMICONDUCTOR MANUFACTURING APPARATUS
20170365465 · 2017-12-21 ·

There is provided a method of manufacturing a semiconductor device, which includes: forming a silicon film inside a recess formed in a surface of a workpiece by supplying a film forming gas containing silicon to the workpiece; subsequently, supplying a process gas, which includes a halogen gas for etching the silicon film and a roughness suppressing gas for suppressing roughening of a surface of the silicon film after being etched by the halogen gas, to the workpiece; etching the silicon film formed on a side wall of the recess to enlarge an opening width of the recess by applying thermal energy to the process gas and activating the process gas; and subsequently, filling silicon into the recess by supplying the film forming gas to the workpiece and depositing silicon on the silicon film remaining in the recess.

METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE, HEAT TREATMENT APPARATUS, AND STORAGE MEDIUM
20170358458 · 2017-12-14 ·

A method of manufacturing a semiconductor device includes: loading a substrate into a process container after dry-etching a portion of a silicon film formed in a recess on the substrate; performing etching to partially or entirely remove the silicon film remaining on a side wall inside the recess by supplying an etching gas selected from a hydrogen bromide gas and a hydrogen iodide gas into the process container of a vacuum atmosphere while heating the substrate; subsequently forming a silicon film inside the recess; and heating the substrate to increase a grain size of the silicon film.

INTERMEDIATE COATING FOR HIGH TEMPERATURE ENVIRONMENTS
20230192554 · 2023-06-22 ·

An article includes a substrate, an intermediate coating on the substrate, and an environmental barrier coating (EBC) on the intermediate coating. The substrate includes a ceramic, ceramic matrix composite (CMC), or superalloy. The EBC includes a rare earth disilicate. When the intermediate coating is at an initial state, such as prior to exposure to an oxidating environment, the intermediate coating includes a bond coat on the substrate and a reactive layer on the bond coat. The bond coat includes silicon, while the reactive layer includes a rare earth monosilicate or rare earth oxide. In response to oxidation of a portion of the silicon of the bond coat to form silicon dioxide, a portion of the rare earth monosilicate or rare earth oxide of the reactive layer is configured to react with at least a portion of the silicon dioxide to form a converted layer that includes a rare earth disilicate.

METHOD AND APPARATUS FOR FORMING CRYSTALLINE SILICON FILM
20230197447 · 2023-06-22 ·

A method of forming a crystalline silicon film includes forming a first amorphous silicon film on a substrate, forming a crystal nucleation film in which crystal nuclei of silicon are formed by performing a first annealing on the substrate having the first amorphous silicon film formed thereon, performing etching with an etching gas, forming a second amorphous silicon film on the crystal nuclei remaining after the etching, and forming a crystalline silicon film by performing a second annealing on the substrate after the forming of the second amorphous silicon film to grow the crystal nuclei.

METHOD AND APPARATUS FOR FORMING CRYSTALLINE SILICON FILM
20230197447 · 2023-06-22 ·

A method of forming a crystalline silicon film includes forming a first amorphous silicon film on a substrate, forming a crystal nucleation film in which crystal nuclei of silicon are formed by performing a first annealing on the substrate having the first amorphous silicon film formed thereon, performing etching with an etching gas, forming a second amorphous silicon film on the crystal nuclei remaining after the etching, and forming a crystalline silicon film by performing a second annealing on the substrate after the forming of the second amorphous silicon film to grow the crystal nuclei.

Methods of preparing high density aligned silicon nanowire

A simple, economical method of producing nanowire arrays is described. The method produces high density arrays having nanowires with diameters below 10 nm and does not require templating, catalysts, or surface pre/post-treatment. The disclosed methods and systems can be used, for example, for optoelectronic devices and photovoltaic cells, Li-ion batteries, chemical/bio sensors and transistors.

XPS metrology for process control in selective deposition

XPS spectra are used to analyze and monitor various steps in the selective deposition process. A goodness of passivation value is derived to analyze and quantify the quality of the passivation step. A selectivity figure of merit value is derived to analyze and quantify the selectivity of the deposition process, especially for selective deposition in the presence of passivation. A ratio of the selectivity figure of merit to maximum selectivity value can also be used to characterize and monitor the deposition process.

XPS metrology for process control in selective deposition

XPS spectra are used to analyze and monitor various steps in the selective deposition process. A goodness of passivation value is derived to analyze and quantify the quality of the passivation step. A selectivity figure of merit value is derived to analyze and quantify the selectivity of the deposition process, especially for selective deposition in the presence of passivation. A ratio of the selectivity figure of merit to maximum selectivity value can also be used to characterize and monitor the deposition process.