C23C16/24

PLASMA SURFACE TREATMENT APPARATUS FOR CONDUCTIVE POWDER

Disclosed is a plasma surface treatment apparatus for conductive powder. The plasma surface treatment apparatus for conductive powder comprises: a reaction chamber including a linear gas inlet at the lower end thereof and a gas outlet at the upper end thereof, and having a vertical cross section that is funnel-shaped; and a plasma jet generation device that is located below the linear gas inlet and is configured to discharge a plasma jet into the reaction chamber from below in an upward direction through the linear gas inlet, wherein powder is accommodated in the reaction chamber and is treated by plasma while buoyed by the plasma jet.

PLASMA SURFACE TREATMENT APPARATUS FOR CONDUCTIVE POWDER

Disclosed is a plasma surface treatment apparatus for conductive powder. The plasma surface treatment apparatus for conductive powder comprises: a reaction chamber including a linear gas inlet at the lower end thereof and a gas outlet at the upper end thereof, and having a vertical cross section that is funnel-shaped; and a plasma jet generation device that is located below the linear gas inlet and is configured to discharge a plasma jet into the reaction chamber from below in an upward direction through the linear gas inlet, wherein powder is accommodated in the reaction chamber and is treated by plasma while buoyed by the plasma jet.

Film forming method and film forming apparatus

There is provided a film forming method including: adsorbing fluorine onto a substrate on which a region in which a nitride film is exposed and a region in which an oxide film is exposed are provided adjacent to each other by supplying a fluorine-containing gas to the substrate, and forming a stepped surface on a side surface of the oxide film by selectively etching the nitride film, among the nitride film and the oxide film, so as to cause a surface of the nitride film to be more deeply recessed than a surface of the oxide film; and after the adsorbing the fluorine onto the substrate and forming the stepped surface, selectively forming a semiconductor film on the nitride film, among the nitride film and the oxide film, by supplying a raw material gas including a semiconductor material to the substrate.

PROCESS FOR PRODUCING NANOCLUSTERS OF SILICON AND/OR GERMANIUM EXHIBITING A PERMANENT MAGNETIC AND/OR ELECTRIC DIPOLE MOMENT
20230009716 · 2023-01-12 ·

A process for producing nanoclusters of silicon and/or germanium exhibiting a permanent magnetic and/or electric dipole moment for adjusting the work function of materials, for micro- and nano-electronics, for telecommunications, for “nano-ovens”, for organic electronics, for photoelectric devices, for catalytic reactions and for fractionation of water.

PROCESS FOR PRODUCING NANOCLUSTERS OF SILICON AND/OR GERMANIUM EXHIBITING A PERMANENT MAGNETIC AND/OR ELECTRIC DIPOLE MOMENT
20230009716 · 2023-01-12 ·

A process for producing nanoclusters of silicon and/or germanium exhibiting a permanent magnetic and/or electric dipole moment for adjusting the work function of materials, for micro- and nano-electronics, for telecommunications, for “nano-ovens”, for organic electronics, for photoelectric devices, for catalytic reactions and for fractionation of water.

VAPOR DEPOSITION DEVICE AND VAPOR DEPOSITION METHOD
20230009579 · 2023-01-12 · ·

A vapor deposition device is provided that can suppress an influence on an epitaxial layer which is caused by a position of a lift pin without adjusting an upper and lower heating ratio of a wafer. A reaction chamber is provided with a susceptor on which a carrier is placed, and a carrier lift pin which moves the carrier vertically relative to the susceptor; and the carrier lift pin is installed outside of an outer edge of the wafer when a state where the carrier supporting the wafer is mounted on the susceptor is viewed in a plan view.

VAPOR DEPOSITION DEVICE AND VAPOR DEPOSITION METHOD
20230009579 · 2023-01-12 · ·

A vapor deposition device is provided that can suppress an influence on an epitaxial layer which is caused by a position of a lift pin without adjusting an upper and lower heating ratio of a wafer. A reaction chamber is provided with a susceptor on which a carrier is placed, and a carrier lift pin which moves the carrier vertically relative to the susceptor; and the carrier lift pin is installed outside of an outer edge of the wafer when a state where the carrier supporting the wafer is mounted on the susceptor is viewed in a plan view.

STRUCTURE AND MANUFACTURING METHOD OF SURFACE ACOUSTIC WAVE FILTER WITH BACK ELECTRODE OF PIEZOELECTRIC LAYER
20230008048 · 2023-01-12 ·

A fabrication method of a surface acoustic wave (SAW) filter includes obtaining a piezoelectric substrate, forming a back electrode on a first portion of the piezoelectric substrate, forming a first dielectric layer on the first portion of the piezoelectric substrate, forming a trench in the first dielectric layer, forming a second dielectric layer on the first dielectric layer formed with the trench, forming a third dielectric layer on the second dielectric layer, removing a second portion of the piezoelectric substrate to obtain a piezoelectric layer, forming an interdigital transducer (IDT) on the piezoelectric layer, and etching and releasing a portion of the first dielectric layer surrounded by the trench to form a cavity below the back electrode.

STRUCTURE AND MANUFACTURING METHOD OF SURFACE ACOUSTIC WAVE FILTER WITH BACK ELECTRODE OF PIEZOELECTRIC LAYER
20230008048 · 2023-01-12 ·

A fabrication method of a surface acoustic wave (SAW) filter includes obtaining a piezoelectric substrate, forming a back electrode on a first portion of the piezoelectric substrate, forming a first dielectric layer on the first portion of the piezoelectric substrate, forming a trench in the first dielectric layer, forming a second dielectric layer on the first dielectric layer formed with the trench, forming a third dielectric layer on the second dielectric layer, removing a second portion of the piezoelectric substrate to obtain a piezoelectric layer, forming an interdigital transducer (IDT) on the piezoelectric layer, and etching and releasing a portion of the first dielectric layer surrounded by the trench to form a cavity below the back electrode.

Silicon or Germanium Network Structure for Use as an Anode in a Battery

The invention provides process for producing a stable Si or Ge electrode structure comprising cycling a Si or Ge nanowire electrode until a structure of the Si nanowires form a continuous porous network of Si or Ge ligaments.