Patent classifications
C23C16/24
METHOD FOR MANUFACTURING EPITAXIAL WAFER AND EPITAXIAL WAFER
A method for manufacturing an epitaxial wafer by forming a single crystal silicon layer on a wafer containing a group IV element including silicon, the method including the steps of: removing a natural oxide film on a surface of the wafer containing the group IV element including silicon in an atmosphere containing hydrogen; forming an oxygen atomic layer by oxidizing the wafer after removing the natural oxide film; and forming a single crystal silicon by epitaxial growth on the surface of the wafer after forming the oxygen atomic layer, where a planar density of oxygen in the oxygen atomic layer is set to 4×10.sup.14 atoms/cm.sup.2 or less. A method for manufacturing an epitaxial wafer having an epitaxial layer of good-quality single crystal silicon while also allowing the introduction of an oxygen atomic layer in an epitaxial layer stably and simply.
METHODS FOR COATING A COMPONENT
A method for processing a component is provided and includes masking a first portion of the component with a maskant. The maskant includes a slurry having a plurality of particles in a fluid carrier. The plurality of particles comprises at least one of silicon, carbon, one or more rare earth disilicates, monosilicates or oxides, and combinations thereof. The method includes depositing a silicon-based coating on a second portion of the component via a chemical vapor deposition process and removing the maskant and any overlying silicon-based coating from the first portion of the component.
METHODS FOR COATING A COMPONENT
A method for processing a component is provided and includes masking a first portion of the component with a maskant. The maskant includes a slurry having a plurality of particles in a fluid carrier. The plurality of particles comprises at least one of silicon, carbon, one or more rare earth disilicates, monosilicates or oxides, and combinations thereof. The method includes depositing a silicon-based coating on a second portion of the component via a chemical vapor deposition process and removing the maskant and any overlying silicon-based coating from the first portion of the component.
METHODS OF FORMATION OF A SIGE/SI SUPERLATTICE
A method and apparatus for forming a super-lattice structure on a substrate is described herein. The super-lattice structure includes a plurality of silicon-germanium layers and a plurality of silicon layers disposed in a stacked pattern. The methods described herein produce a super-lattice structure with transition width of less than about 1.4 nm between each of the silicon-germanium layers and an adjacent silicon layer. The methods described herein include flowing one or a combination of a silicon containing gas, a germanium containing gas, and a halogenated species.
Process and apparatus for removal of impurities from chlorosilanes
A process for removal of impurities, in particular of dopants, from chlorosilanes which includes the following steps: (a) heating a deposition surface (3); (b) contacting the heated deposition surface (3) with at least one gaseous chlorosilane mixture, the gaseous chlorosilane mixture including at least one chlorosilane and at least one impurity, in particular at least one dopant; (c) at least partially removing the impurity, in particular the dopant, by forming polycrystalline silicon depositions on the deposition surface (3), the polycrystalline silicon depositions being enriched with the impurity, in particular with the dopant; (d) discharging the purified gaseous chlorosilane mixture; (e) contacting the heated deposition surface (3) with an etching gas to return the polycrystalline silicon depositions and the impurity, in particular the dopant, into the gas phase to form a gaseous etching gas mixture; and (f) discharging the gaseous etching gas mixture.
Process and apparatus for removal of impurities from chlorosilanes
A process for removal of impurities, in particular of dopants, from chlorosilanes which includes the following steps: (a) heating a deposition surface (3); (b) contacting the heated deposition surface (3) with at least one gaseous chlorosilane mixture, the gaseous chlorosilane mixture including at least one chlorosilane and at least one impurity, in particular at least one dopant; (c) at least partially removing the impurity, in particular the dopant, by forming polycrystalline silicon depositions on the deposition surface (3), the polycrystalline silicon depositions being enriched with the impurity, in particular with the dopant; (d) discharging the purified gaseous chlorosilane mixture; (e) contacting the heated deposition surface (3) with an etching gas to return the polycrystalline silicon depositions and the impurity, in particular the dopant, into the gas phase to form a gaseous etching gas mixture; and (f) discharging the gaseous etching gas mixture.
METAL COMPONENTS WITH INERT VAPOR PHASE COATING ON INTERNAL SURFACES
The invention provides metal liquid chromatography components with uniformly coated internal surfaces and methods for achieving the same. The invention addresses the problem of corrosion or interference of metal components in the flow path for LC analyses in which the sample interacts with metal ions or surfaces. The invention also alleviates the difficulties in coating very long metal tubes and very small metal channels with an inert, continuous coating that adheres well to metal surfaces. The metal flow path is rendered inert by the coating, and thus compatible with bioanalytical separations, for example, by using a vapor phase deposition process to coat the inner surfaces with a coating that continuously covers all metal surfaces in the flow path.
METAL COMPONENTS WITH INERT VAPOR PHASE COATING ON INTERNAL SURFACES
The invention provides metal liquid chromatography components with uniformly coated internal surfaces and methods for achieving the same. The invention addresses the problem of corrosion or interference of metal components in the flow path for LC analyses in which the sample interacts with metal ions or surfaces. The invention also alleviates the difficulties in coating very long metal tubes and very small metal channels with an inert, continuous coating that adheres well to metal surfaces. The metal flow path is rendered inert by the coating, and thus compatible with bioanalytical separations, for example, by using a vapor phase deposition process to coat the inner surfaces with a coating that continuously covers all metal surfaces in the flow path.
PROCESS FOR PRODUCING POLYCRYSTALLINE SILICON
Polycrystalline silicon is produced in a chemical vapour deposition reactor, wherein, outside the reactor at at least one position on at least one reactor component, vibrations of the reactor are measured using a measurement device and optionally recorded. The vibrations may be used to identify rod fall over and other events occurring within the reactor.
PROCESS FOR PRODUCING POLYCRYSTALLINE SILICON
Polycrystalline silicon is produced in a chemical vapour deposition reactor, wherein, outside the reactor at at least one position on at least one reactor component, vibrations of the reactor are measured using a measurement device and optionally recorded. The vibrations may be used to identify rod fall over and other events occurring within the reactor.