Patent classifications
C23C16/453
SURFACE ENGINEERED METAL SUBSTRATES AND RELATED METHODS
Disclosed herein are systems and methods for engineering a metal substrate surface via a dry chemical deposition technique. Also described herein are the resulting surface engineered metal substrates. More particularly, disclosed are surface engineered metal substrates having thin films deposited via flame pyrolysis of a mixture of a gas mixture comprising an oxidizer and a combustible gas, a chemical precursor comprising a silicon-containing compound and/or a phosphorus-containing compound, and a chemical additive.
SURFACE ENGINEERED METAL SUBSTRATES AND RELATED METHODS
Disclosed herein are systems and methods for engineering a metal substrate surface via a dry chemical deposition technique. Also described herein are the resulting surface engineered metal substrates. More particularly, disclosed are surface engineered metal substrates having thin films deposited via flame pyrolysis of a mixture of a gas mixture comprising an oxidizer and a combustible gas, a chemical precursor comprising a silicon-containing compound and/or a phosphorus-containing compound, and a chemical additive.
HANDLING AND PROCESSING DOUBLE-SIDED DEVICES ON FRAGILE SUBSTRATES
Embodiments of the present disclosure generally relate to substrate support assemblies for retaining a surface of a substrate having one or more devices disposed on the surface without contacting the one or more devices and deforming the substrate, and a system having the same. In one embodiment, the substrate support assembly includes an edge ring coupled to a body of the substrate support assembly. A controller is coupled to actuated mechanisms of a plurality of pixels coupled to the body of the substrate support assembly such that portions of pixels corresponding to a portion of the surface of a substrate to be retained are positioned to support the portion without contacting one or more devices disposed on the surface of the substrate to be retained on the support surface.
High refractive index hydrogenated silicon carbide and process
In a method for depositing a layer of amorphous hydrogenated silicon carbide (SiC:H), a gas mixture comprising a reactive gas to inert gas volume ratio of 1:12 to 2:3 is introduced into a reaction chamber of a plasma-enhanced chemical vapor deposition apparatus. The reactive gas has a ratio of Si of 50 to 60, C of 3 to 13, and H of 32 to 42 at %. The inert gas comprises i) a first inert gas selected from helium, neon and mixtures; and ii) a second inert gas selected from argon, krypton, xenon and mixtures. The reaction plasma is at a power frequency of 1-16 MHz at a power level of 100 W to 700 W. The resulting layer exhibits a refractive index of not less than 2.4 and a loss of not more than 180 dB/cm at an indicated wavelength within 800 to 900 nm.
High refractive index hydrogenated silicon carbide and process
In a method for depositing a layer of amorphous hydrogenated silicon carbide (SiC:H), a gas mixture comprising a reactive gas to inert gas volume ratio of 1:12 to 2:3 is introduced into a reaction chamber of a plasma-enhanced chemical vapor deposition apparatus. The reactive gas has a ratio of Si of 50 to 60, C of 3 to 13, and H of 32 to 42 at %. The inert gas comprises i) a first inert gas selected from helium, neon and mixtures; and ii) a second inert gas selected from argon, krypton, xenon and mixtures. The reaction plasma is at a power frequency of 1-16 MHz at a power level of 100 W to 700 W. The resulting layer exhibits a refractive index of not less than 2.4 and a loss of not more than 180 dB/cm at an indicated wavelength within 800 to 900 nm.
SPARK PLUG HOUSING INCLUDING AN ELECTROPLATED OR A CHEMICALLY APPLIED NICKEL-CONTAINING PROTECTIVE LAYER AND A SILICON-CONTAINING SEALING LAYER, AND A SPARK PLUG INCLUDING THIS HOUSING, AND METHOD FOR MANUFACTURING THIS HOUSING
A housing for a spark plug. The housing includes a bore along the longitudinal axis X of the housing, as the result of which the housing has an outer side and an inner side, and an electroplated or chemically applied nickel-containing protective layer situated on at least one portion of the outer side of the housing and a sealing layer situated on the nickel-containing protective layer. The sealing layer contains silicon. A first intermediate layer is applied between the housing and the nickel-containing protective layer and/or a second intermediate layer is applied between the nickel-containing protective layer and the sealing layer and/or a cover layer is applied on the sealing layer. The sealing layer may be free of chromium.
SEMICONDUCTOR DEVICE, METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE, INVERTER CIRCUIT, DRIVE DEVICE, VEHICLE, AND ELEVATOR
A semiconductor device according to an embodiment includes: a silicon carbide layer; a silicon oxide layer; and a region disposed between the silicon carbide layer and the silicon oxide layer and having a nitrogen concentration equal to or more than 1×10.sup.21 cm.sup.−3. Nitrogen concentration distribution in the silicon carbide layer, the silicon oxide layer, and the region have a peak in the region, a nitrogen concentration at a position 1 nm away from the peak to the side of the silicon oxide layer is equal to or less than 1×10.sup.18 cm.sup.−3, and a carbon concentration at the position is equal to or less than 1×10.sup.18 cm.sup.−3.
SEMICONDUCTOR DEVICE, METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE, INVERTER CIRCUIT, DRIVE DEVICE, VEHICLE, AND ELEVATOR
A semiconductor device according to an embodiment includes: a silicon carbide layer; a silicon oxide layer; and a region disposed between the silicon carbide layer and the silicon oxide layer and having a nitrogen concentration equal to or more than 1×10.sup.21 cm.sup.−3. Nitrogen concentration distribution in the silicon carbide layer, the silicon oxide layer, and the region have a peak in the region, a nitrogen concentration at a position 1 nm away from the peak to the side of the silicon oxide layer is equal to or less than 1×10.sup.18 cm.sup.−3, and a carbon concentration at the position is equal to or less than 1×10.sup.18 cm.sup.−3.
CHEMICAL VAPOR DEPOSITION PROCESS FOR FORMING A SILICON OXIDE COATING
A chemical vapor deposition process for forming a silicon oxide coating includes providing a moving glass substrate. A gaseous mixture is formed and includes a silane compound, a first oxygen-containing molecule, a radical scavenger, and at least one of a phosphorus-containing compound and a boron-containing compound. The gaseous mixture is directed toward and along the glass substrate. The gaseous mixture is reacted over the glass substrate to form a silicon oxide coating on the glass substrate at a deposition rate of 150 nm*m/min or more.
CHEMICAL VAPOR DEPOSITION PROCESS FOR FORMING A SILICON OXIDE COATING
A chemical vapor deposition process for forming a silicon oxide coating includes providing a moving glass substrate. A gaseous mixture is formed and includes a silane compound, a first oxygen-containing molecule, a radical scavenger, and at least one of a phosphorus-containing compound and a boron-containing compound. The gaseous mixture is directed toward and along the glass substrate. The gaseous mixture is reacted over the glass substrate to form a silicon oxide coating on the glass substrate at a deposition rate of 150 nm*m/min or more.