Patent classifications
C23C16/52
IMPEDANCE MEASUREMENT JIG AND METHOD OF CONTROLLING A SUBSTRATE-PROCESSING APPARATUS USING THE JIG
An impedance measurement jig may include a first contact plate, a second contact plate, a cover plate, a plug, and an analyzer. The first contact plate may make electrical contact with an ESC in a substrate-processing apparatus. The second contact plate may make electrical contact with a focus ring configured to surround the ESC. The cover plate may be configured to cover an upper surface of the substrate-processing apparatus. The plug may be installed at the cover plate to selectively make contact with the first contact plate or the second contact plate. The analyzer may individually apply a power to the first contact plate and the second contact plate through the plug to measure an impedance of the ESC and an impedance of the focus ring. Thus, the impedances of the ESC and the focus ring may be individually measured to inspect the ESC and/or the focus ring.
METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE, SUBSTRATE PROCESSING APPARATUS, RECORDING MEDIUM, AND METHOD OF PROCESSING SUBSTRATE
There is provided a technique that includes (a) supplying a first-element-containing gas to the substrate; (b) supplying a first reducing gas to the substrate; (c) supplying a second reducing gas, which is different from the first reducing gas, to the substrate; (d) supplying a third reducing gas, which is different from both the first reducing gas and the second reducing gas, to the substrate; (e) after a start of (a), performing (b) in parallel with (a); (f) in (e), performing (d) in parallel with (b); and (g) forming a first-element-containing film on the substrate by alternately performing (e) and (c) a predetermined number of times.
SiC EPITAXIAL WAFER AND METHOD OF MANUFACTURING SiC EPITAXIAL WAFER
A SiC epitaxial wafer includes a SiC substrate and an epitaxial layer laminated on the SiC substrate, wherein the epitaxial layer contains an impurity element which determines the conductivity type of the epitaxial layer and boron which has a conductivity type different from the conductivity type of the impurity element, and the concentration of boron is less than 1.0×10.sup.14 cm.sup.−3 at any position in the plane of the epitaxial layer.
SiC EPITAXIAL WAFER AND METHOD OF MANUFACTURING SiC EPITAXIAL WAFER
A SiC epitaxial wafer includes a SiC substrate and an epitaxial layer laminated on the SiC substrate, wherein the epitaxial layer contains an impurity element which determines the conductivity type of the epitaxial layer and boron which has a conductivity type different from the conductivity type of the impurity element, and the concentration of boron is less than 1.0×10.sup.14 cm.sup.−3 at any position in the plane of the epitaxial layer.
PRECURSOR DELIVERY SYSTEM AND METHOD THEREFOR
A semiconductor processing system for delivering large capacity vaporized precursor from solid or liquid precursor source is disclosed. The system utilizes a carrier gas to feed the vaporized precursor to a remotely located process zone where multiple process modules are disposed. The system comprises a first and second buffer volumes configured to reduce pressure drop and increase delivery rates. A method for delivering a large capacity vaporized precursor to the remotely located process zone are also disclosed.
PRECURSOR DELIVERY SYSTEM AND METHOD THEREFOR
A semiconductor processing system for delivering large capacity vaporized precursor from solid or liquid precursor source is disclosed. The system utilizes a carrier gas to feed the vaporized precursor to a remotely located process zone where multiple process modules are disposed. The system comprises a first and second buffer volumes configured to reduce pressure drop and increase delivery rates. A method for delivering a large capacity vaporized precursor to the remotely located process zone are also disclosed.
Silicon or Germanium Network Structure for Use as an Anode in a Battery
The invention provides process for producing a stable Si or Ge electrode structure comprising cycling a Si or Ge nanowire electrode until a structure of the Si nanowires form a continuous porous network of Si or Ge ligaments.
Silicon or Germanium Network Structure for Use as an Anode in a Battery
The invention provides process for producing a stable Si or Ge electrode structure comprising cycling a Si or Ge nanowire electrode until a structure of the Si nanowires form a continuous porous network of Si or Ge ligaments.
Thin film deposition system capable of physical vapor deposition and chemical vapor deposition simultaneously
A multi-deposition chamber apparatus is provided that includes a first deposition chamber that includes a substrate holder, a retractable sputter gun, a gate valve, an output port, a retractable chamber separator, a gas input port, a gas output port, and an electron cyclotron resonance plasma source, where the retractable chamber separator is configured to selectively segment the first deposition chamber to form a second deposition chamber, where the second deposition chamber comprises the substrate holder, the gas input port, the gas output port and the electron cyclotron resonance plasma source.
Thin film deposition system capable of physical vapor deposition and chemical vapor deposition simultaneously
A multi-deposition chamber apparatus is provided that includes a first deposition chamber that includes a substrate holder, a retractable sputter gun, a gate valve, an output port, a retractable chamber separator, a gas input port, a gas output port, and an electron cyclotron resonance plasma source, where the retractable chamber separator is configured to selectively segment the first deposition chamber to form a second deposition chamber, where the second deposition chamber comprises the substrate holder, the gas input port, the gas output port and the electron cyclotron resonance plasma source.