Provided is a shock absorber in which trivalent chromium is used to achieve both high hardness and low frictional force at a high level without using hexavalent chromium which is suspected of causing damage to the human body and the environment, and a method for manufacturing the shock absorber.

A shock absorber (100) of the present invention includes: a cylinder (1) which is filled with hydraulic oil (3); a piston rod (2) which is movable in the cylinder (1); and an oil seal (8) which is fixed to the cylinder (1) and slides on the piston rod (2), in which a hard layer mainly containing chromium obtained from a trivalent chromium plating bath is provided on a surface of the piston rod (2), and the hard layer contains both a crystalline material and an amorphous material, and also contains an additive other than chromium.

An article for a gas turbine engine according to an exemplary embodiment of this disclosure, among other possible things includes a substrate and a nickel phosphorous coating disposed on the substrate. The nickel phosphorus coating has a columnar microstructure. A method of applying a coating to an article for a gas turbine engine is also disclosed.

An electrode of a chemical cell includes a substrate having a surface, an array of conductive projections supported by the substrate and extending outward from the surface of the substrate, each conductive projection of the array of conductive projections having a semiconductor composition for reduction of carbon dioxide (CO.sub.2) in the chemical cell, and a catalyst arrangement disposed along each conductive projection of the array of conductive projections, the catalyst arrangement including a copper-based catalyst and an iron-based catalyst for the reduction of carbon dioxide (CO.sub.2) in the chemical cell.

Semiconductor dies including ultra-thin wafer backmetal systems, microelectronic devices containing such semiconductor dies, and associated fabrication methods are disclosed. In one embodiment, a method for processing a device wafer includes obtaining a device wafer having a wafer frontside and a wafer backside opposite the wafer frontside. A wafer-level gold-based ohmic bond layer, which has a first average grain size and which is predominately composed of gold, by weight, is sputter deposited onto the wafer backside. An electroplating process is utilized to deposit a wafer-level silicon ingress-resistant plated layer over the wafer-level Au-based ohmic bond layer, while imparting the plated layer with a second average grain size exceeding the first average grain size. The device wafer is singulated to separate the device wafer into a plurality of semiconductor die each having a die frontside, an Au-based ohmic bond layer, and a silicon ingress-resistant plated layer.

Semiconductor dies including ultra-thin wafer backmetal systems, microelectronic devices containing such semiconductor dies, and associated fabrication methods are disclosed. In one embodiment, a method for processing a device wafer includes obtaining a device wafer having a wafer frontside and a wafer backside opposite the wafer frontside. A wafer-level gold-based ohmic bond layer, which has a first average grain size and which is predominately composed of gold, by weight, is sputter deposited onto the wafer backside. An electroplating process is utilized to deposit a wafer-level silicon ingress-resistant plated layer over the wafer-level Au-based ohmic bond layer, while imparting the plated layer with a second average grain size exceeding the first average grain size. The device wafer is singulated to separate the device wafer into a plurality of semiconductor die each having a die frontside, an Au-based ohmic bond layer, and a silicon ingress-resistant plated layer.

Semiconductor dies including ultra-thin wafer backmetal systems, microelectronic devices containing such semiconductor dies, and associated fabrication methods are disclosed. In one embodiment, a method for processing a device wafer includes obtaining a device wafer having a wafer frontside and a wafer backside opposite the wafer frontside. A wafer-level gold-based ohmic bond layer, which has a first average grain size and which is predominately composed of gold, by weight, is sputter deposited onto the wafer backside. An electroplating process is utilized to deposit a wafer-level silicon ingress-resistant plated layer over the wafer-level Au-based ohmic bond layer, while imparting the plated layer with a second average grain size exceeding the first average grain size. The device wafer is singulated to separate the device wafer into a plurality of semiconductor die each having a die frontside, an Au-based ohmic bond layer, and a silicon ingress-resistant plated layer.

A method of making property modulated composite materials includes depositing a first layer of material having a first microstructure/nanostructure on a substrate followed by depositing a second layer of material having a second microstructure/nanostructure that differs from the first layer. Multiple first and second layers can be deposited to form a composite material that includes a plurality of adjacent first and second layers. By controlling the microstructure/nanostructure of the layers, the material properties of the composite material formed by this method can be tailored for a specific use. The microstructures/nanostructures of the composite materials may be defined by one or more of grain size, grain boundary geometry, crystal orientation, and a defect density.

An article for a gas turbine engine according to an exemplary embodiment of this disclosure, among other possible things includes a substrate and a nickel phosphorous coating disposed on the substrate. The nickel phosphorus coating has a columnar microstructure. A method of applying a coating to an article for a gas turbine engine is also disclosed.

A method of making property modulated composite materials includes depositing a first layer of material having a first microstructure/nanostructure on a substrate followed by depositing a second layer of material having a second microstructure/nanostructure that differs from the first layer. Multiple first and second layers can be deposited to form a composite material that includes a plurality of adjacent first and second layers. By controlling the microstructure/nanostructure of the layers, the material properties of the composite material formed by this method can be tailored for a specific use. The microstructures/nanostructures of the composite materials may be defined by one or more of grain size, grain boundary geometry, crystal orientation, and a defect density.

A sterilizing and environment-friendly composite plating layer, a preparation method therefor, and a sterilizing and environment-friendly product. The sterilizing and environment-friendly composite plating layer comprises: a semi-bright nickel layer, a high sulfur nickel layer, and an environment-friendly white chromium composite sterilizing layer; the semi-bright nickel layer is disposed on a substrate that has a sterilizing requirement; the high sulfur nickel layer is disposed on a surface of the side of the semi-bright nickel layer away from the substrate; the environment-friendly white chromium composite sterilizing layer is disposed on a surface of the side of the high sulfur nickel layer away from the substrate; the environment-friendly white chromium composite sterilizing layer has a nano-needle structure and is formed by a sterilizing ammonium salt-containing composite raw material; and the concentration of the sterilizing ammonium salt in the composite raw material is 50 g/L to 100 g/L.