Various technologies are described herein pertaining to electrochemical etching of a semiconductor controlled by way of a laser that emits light with an energy below a bandgap energy of the semiconductor.

Various technologies are described herein pertaining to electrochemical etching of a semiconductor controlled by way of a laser that emits light with an energy below a bandgap energy of the semiconductor.

An etcher comprises a bath, a plurality of blades, and a tunnel. The bath includes a first electrode at a first end and a second electrode at a second end. The plurality of blades is configured to fit in the bath. At least one blade of the plurality of blades holds a wafer. At least one tunnel is configured to fit between adjacent blades of the plurality of blades in the bath.

An etcher comprises a bath, a plurality of blades, and a tunnel. The bath includes a first electrode at a first end and a second electrode at a second end. The plurality of blades is configured to fit in the bath. At least one blade of the plurality of blades holds a wafer. At least one tunnel is configured to fit between adjacent blades of the plurality of blades in the bath.

This disclosure enables high-productivity fabrication of porous semiconductor layers (made of single layer or multi-layer porous semiconductors such as porous silicon, comprising single porosity or multi-porosity layers). Some applications include fabrication of MEMS separation and sacrificial layers for die detachment and MEMS device fabrication, membrane formation and shallow trench isolation (STI) porous silicon (using porous silicon formation with an optimal porosity and its subsequent oxidation). Further, this disclosure is applicable to the general fields of photovoltaics, MEMS, including sensors and actuators, stand-alone, or integrated with integrated semiconductor microelectronics, semiconductor microelectronics chips and optoelectronics.

This disclosure enables high-productivity fabrication of porous semiconductor layers (made of single layer or multi-layer porous semiconductors such as porous silicon, comprising single porosity or multi-porosity layers). Some applications include fabrication of MEMS separation and sacrificial layers for die detachment and MEMS device fabrication, membrane formation and shallow trench isolation (STI) porous silicon (using porous silicon formation with an optimal porosity and its subsequent oxidation). Further, this disclosure is applicable to the general fields of photovoltaics, MEMS, including sensors and actuators, stand-alone, or integrated with integrated semiconductor microelectronics, semiconductor microelectronics chips and optoelectronics.

Methods and apparatus for forming porous silicon layers are provided. In some embodiments, an anodizing bath includes: a housing having a first volume to hold a chemical solution; a cathode disposed within the first volume at a first side of the housing; an anode disposed within the first volume at a second side of the housing, opposite the first side, wherein a face of each of the cathode and the anode have a given surface area; a substrate holder configured to retain a plurality of substrates along a perimeter thereof within the first volume in a plurality of substrate holding positions, a plurality of vent openings fluidly coupled to the first volume to release process gases, wherein a top of each of the plurality of vent openings are disposed above a chemical solution fill level in the first volume.

A method includes: in a semiconductor wafer having a first semiconductor layer and a second semiconductor layer adjoining the first semiconductor layer, forming a porous region extending from a front surface into the first semiconductor layer; and removing the porous region by an etching process, wherein a doping concentration of the second semiconductor layer is less than 10.sup.−2 times a doping concentration of the first semiconductor layer and/or a doping type of the second semiconductor layer is complementary to a doping type of the first semiconductor layer, wherein forming the porous region comprises bringing in contact a porosifying agent with the front surface of the first semiconductor layer and applying a voltage between the first semiconductor layer and a first electrode that is in contact with the porosifying agent, wherein applying the voltage comprises applying the voltage between the first electrode and an edge region of the first semiconductor layer.

A wet etch apparatus includes a wafer chuck, a dispensing nozzle, a liquid etchant container, and an electric field generator. The dispensing nozzle is above the wafer chuck. The liquid etchant container is in fluid communication with the dispensing nozzle. The electric field generator is operative to generate an electric field across the wafer chuck. The electric field generator includes a first electrode and a second electrode spaced apart from the first electrode in a direction substantially perpendicular to a top surface of the wafer chuck, and the second electrode is an electrode plate above the wafer chuck.

A wet etch apparatus includes a wafer chuck, a dispensing nozzle, a liquid etchant container, and an electric field generator. The dispensing nozzle is above the wafer chuck. The liquid etchant container is in fluid communication with the dispensing nozzle. The electric field generator is operative to generate an electric field across the wafer chuck. The electric field generator includes a first electrode and a second electrode spaced apart from the first electrode in a direction substantially perpendicular to a top surface of the wafer chuck, and the second electrode is an electrode plate above the wafer chuck.