Patent classifications
C30B25/04
Optimized Heteroepitaxial Growth of Semiconductors
A method of performing heteroepitaxy comprises exposing a substrate to a carrier gas, a first precursor gas, a Group II/III element, and a second precursor gas, to form a heteroepitaxial growth of one of GaAs, AlAs, InAs, GaP, InP, ZnSe, GaSe, CdSe, InSe, ZnTe, CdTe, GaTe, HgTe, GaSb, InSb, AlSb, CdS, GaN, and AlN on the substrate; wherein the substrate comprises one of GaAs, AlAs, InAs, GaP, InP, ZnSe, GaSe, CdSe, InSe, ZnTe, CdTe, GaTe, HgTe, GaSb, InSb, AlSb, CdS, GaN, and AlN; wherein the carrier gas is H.sub.2, wherein the first precursor is HCl, the Group II/III element comprises at least one of Zn, Cd, Hg, Al, Ga, and In; and wherein the second precursor is one of AsH.sub.3 (arsine), PH.sub.3 (phosphine), H.sub.2Se (hydrogen selenide), H.sub.2Te (hydrogen telluride), SbH.sub.3 (hydrogen antimonide), H.sub.2S (hydrogen sulfide), and NH.sub.3 (ammonia). The process may be an HVPE (hydride vapor phase epitaxy) process.
Optimized Heteroepitaxial Growth of Semiconductors
A method of performing heteroepitaxy comprises exposing a substrate to a carrier gas, a first precursor gas, a Group II/III element, and a second precursor gas, to form a heteroepitaxial growth of one of GaAs, AlAs, InAs, GaP, InP, ZnSe, GaSe, CdSe, InSe, ZnTe, CdTe, GaTe, HgTe, GaSb, InSb, AlSb, CdS, GaN, and AlN on the substrate; wherein the substrate comprises one of GaAs, AlAs, InAs, GaP, InP, ZnSe, GaSe, CdSe, InSe, ZnTe, CdTe, GaTe, HgTe, GaSb, InSb, AlSb, CdS, GaN, and AlN; wherein the carrier gas is H.sub.2, wherein the first precursor is HCl, the Group II/III element comprises at least one of Zn, Cd, Hg, Al, Ga, and In; and wherein the second precursor is one of AsH.sub.3 (arsine), PH.sub.3 (phosphine), H.sub.2Se (hydrogen selenide), H.sub.2Te (hydrogen telluride), SbH.sub.3 (hydrogen antimonide), H.sub.2S (hydrogen sulfide), and NH.sub.3 (ammonia). The process may be an HVPE (hydride vapor phase epitaxy) process.
METHOD FOR FLATTENING A SURFACE ON AN EPITAXIAL LATERAL GROWTH LAYER
A method for flattening a surface on an epitaxial lateral overgrowth (ELO) layer, resulting in obtaining a smooth surface with island-like III-nitride semiconductor layers. The island-like III-nitride semiconductor layers are formed by stopping the growth of the ELO layers before they coalesce to each other. Then, a growth restrict mask is removed before at least some III-nitride device layers are grown. Removing the mask decreases an excess gases supply to side facets of the island-like III-nitride semiconductor layers, which can help to obtain a smooth surface on the island-like III-nitride semiconductor layers. The method also avoids compensation of a p-type layer by decomposed n-type dopant from the mask, such as Silicon and Oxygen atoms.
Fabrication of electronic devices using sacrificial seed layers
A method of making a semiconductor device includes depositing an amorphous layer on a substrate, masking a portion of the amorphous layer, removing a portion of the amorphous layer to form a first channel into the amorphous layer, depositing a semiconductor layer onto the substrate layer, and removing at least a portion of a defect region of the semiconductor layer to form a second channel.
METHOD OF MANUFACTURING SEMICONDUCTOR ELEMENT, SEMICONDUCTOR ELEMENT, AND SUBSTRATE
A method of manufacturing a semiconductor element according to the present disclosure includes a mask forming step of defining, on a first surface of a substrate, a front surface region not covered by a first deposition inhibiting mask as a first crystal growth region, an element forming step of forming a semiconductor layer over the first crystal growth region, a mask removing step of removing the mask, and an element separating step of separating the semiconductor layer. After the element separating step, a substrate reusing process is performed one or more times, the substrate reusing process including a mask reforming step of forming a second deposition inhibiting mask in a region differing from a formation position of the first deposition inhibiting mask to expose a second crystal growth region not covered by the mask, an element reforming step of forming a semiconductor layer to serve as an element on the second crystal growth region, a mask removing step of removing the deposition inhibiting mask, and an element separating step of separating the semiconductor layer from the substrate.
METHOD OF MANUFACTURING SEMICONDUCTOR ELEMENT, SEMICONDUCTOR ELEMENT, AND SUBSTRATE
A method of manufacturing a semiconductor element according to the present disclosure includes a mask forming step of defining, on a first surface of a substrate, a front surface region not covered by a first deposition inhibiting mask as a first crystal growth region, an element forming step of forming a semiconductor layer over the first crystal growth region, a mask removing step of removing the mask, and an element separating step of separating the semiconductor layer. After the element separating step, a substrate reusing process is performed one or more times, the substrate reusing process including a mask reforming step of forming a second deposition inhibiting mask in a region differing from a formation position of the first deposition inhibiting mask to expose a second crystal growth region not covered by the mask, an element reforming step of forming a semiconductor layer to serve as an element on the second crystal growth region, a mask removing step of removing the deposition inhibiting mask, and an element separating step of separating the semiconductor layer from the substrate.
FABRICATION OF METASTABLE CRYSTALLINE STRUCTURES
A method for fabricating a metastable crystalline structure is provided. The method includes providing a base substrate, wherein the base substrate comprises an insulating layer. The method further includes providing a metastable seed crystal on the base substrate, wherein the metastable seed crystal has a predefined metastable crystal phase or a predefined metastable composition. The method further includes forming a template structure above the base substrate, wherein the template structure covers at least a part of the metastable seed crystal. The method further includes growing the metastable crystalline structure with the predefined metastable crystal phase or the predefined metastable composition of the seed crystal inside the template structure. The growing of the metastable crystalline structure is nucleated from the seed crystal. Crystalline structures produced by the methods described herein are also provided.
CRYSTALLINE FILM AND METHOD FOR MANUFACTURING THE SAME
A high-quality crystalline film having less impurity of Si and the like and useful in semiconductor devices is provided. A crystalline film containing a crystalline metallic oxide including gallium as a main component, wherein the crystalline film includes a Si in a content of 2×10.sup.15 cm.sup.−3 or less.
CRYSTALLINE FILM AND METHOD FOR MANUFACTURING THE SAME
A high-quality crystalline film having less impurity of Si and the like and useful in semiconductor devices is provided. A crystalline film containing a crystalline metallic oxide including gallium as a main component, wherein the crystalline film includes a Si in a content of 2×10.sup.15 cm.sup.−3 or less.
Metal organic chemical vapor depostion (MOCVD) tunnel junction growth in III-nitride devices
A method for fabricating an (Al,Ga,In,B)N or III-nitride semiconductor device, including performing a growth of III-nitride or (Al,Ga,In,B)N material including a p-n junction with an active region and using metal-organic chemical vapor deposition (MOCVD) or chemical vapor deposition; and performing a subsequent regrowth of n-type (Al,Ga,In,B)N or III-nitride material using MOCVD or chemical vapor deposition while utilizing a pulsed delta n-type doping scheme to realize an abrupt, smoother surface of the n-type material and a higher carrier concentration in the n-type material. In another example, the method comprises forming a mesa having a top surface; and activating magnesium in the p-type GaN of the (Al,Ga,In,B)N material through openings in the top surface that expose the p-type GaN's surface. The openings are formed before or after the subsequent regrowth of the tunnel junction.