Patent classifications
C30B29/40
Layered group III-V compound including additive elements and having ferroelectric-like properties, and nanosheet using the same
Proposed are a layered Group III-V compound having ferroelectric properties, a Group III-V compound nanosheet that may be prepared using the same, and an electrical device including the materials. Proposed is a layered compound represented by [Formula 1] M.sub.x−mA.sub.yB.sub.z (M is at least one of Group I or Group II elements, A is at least one of Group III elements, B is at least one of Group V elements, x, y, and z are positive numbers which are determined according to stoichiometric ratios to ensure charge balance when m is 0, and 0<m<x), and having ferroelectric-like properties.
Layered group III-V compound including additive elements and having ferroelectric-like properties, and nanosheet using the same
Proposed are a layered Group III-V compound having ferroelectric properties, a Group III-V compound nanosheet that may be prepared using the same, and an electrical device including the materials. Proposed is a layered compound represented by [Formula 1] M.sub.x−mA.sub.yB.sub.z (M is at least one of Group I or Group II elements, A is at least one of Group III elements, B is at least one of Group V elements, x, y, and z are positive numbers which are determined according to stoichiometric ratios to ensure charge balance when m is 0, and 0<m<x), and having ferroelectric-like properties.
Polycrystalline ceramic substrate, bonding-layer-including polycrystalline ceramic substrate, and laminated substrate
Provided is a polycrystalline ceramic substrate to be bonded to a compound semiconductor substrate with a bonding layer interposed therebetween, wherein at least one of relational expression (1) 0.7<α.sub.1/α.sub.2<0.9 and relational expression (2) 0.7<α.sub.3/α.sub.4<0.9 holds, where α.sub.1 represents a linear expansion coefficient of the polycrystalline ceramic substrate at 30° C. to 300° C. and α.sub.2 represents a linear expansion coefficient of the compound semiconductor substrate at 30° C. to 300° C., and α.sub.3 represents a linear expansion coefficient of the polycrystalline ceramic substrate at 30° C. to 1000° C. and α.sub.4 represents a linear expansion coefficient of the compound semiconductor substrate at 30° C. to 1000° C.
Polycrystalline ceramic substrate, bonding-layer-including polycrystalline ceramic substrate, and laminated substrate
Provided is a polycrystalline ceramic substrate to be bonded to a compound semiconductor substrate with a bonding layer interposed therebetween, wherein at least one of relational expression (1) 0.7<α.sub.1/α.sub.2<0.9 and relational expression (2) 0.7<α.sub.3/α.sub.4<0.9 holds, where α.sub.1 represents a linear expansion coefficient of the polycrystalline ceramic substrate at 30° C. to 300° C. and α.sub.2 represents a linear expansion coefficient of the compound semiconductor substrate at 30° C. to 300° C., and α.sub.3 represents a linear expansion coefficient of the polycrystalline ceramic substrate at 30° C. to 1000° C. and α.sub.4 represents a linear expansion coefficient of the compound semiconductor substrate at 30° C. to 1000° C.
METHOD FOR REDUCING A LATERAL GROWTH OF CRYSTALS
The present invention relates to a method for reducing lateral growth as well as growth of the bottom surface of crystals in a crystal growing process, wherein before the crystal seed undergoes a growing process the method includes a step of wrapping the crystal seed with metal foil so that all the side surfaces as well as the bottom surface of the crystal seed are surrounded by the foil.
MANUFACTURING APPARATUS FOR GROUP-III NITRIDE CRYSTAL AND MANUFACTURING METHOD FOR GROUP-III NITRIDE CRYSTAL
A manufacturing apparatus for a group-III nitride crystal, the manufacturing apparatus includes: a raw material chamber that produces therein a group-III element oxide gas; and a nurturing chamber in which a group-III element oxide gas supplied from the raw material chamber and a nitrogen element-containing gas react therein to produce a group-III nitride crystal on a seed substrate, wherein an angle that is formed by a direction along a shortest distance between a forward end of a group-III element oxide gas supply inlet to supply the group-III element oxide gas into the nurturing chamber and an outer circumference of the seed substrate placed in the nurturing chamber, and a surface of the seed substrate is denoted by “θ”, wherein a diameter of the group-Ill element oxide gas supply inlet is denoted by “S”, wherein a distance between a surface, on which the seed substrate is placed, of a substrate susceptor that holds the seed substrate and a forward end of a first carrier gas supply inlet to supply a first carrier gas into the nurturing chamber is denoted by “L.sub.1”, wherein a distance between the forward end of the first carrier gas supply inlet and the forward end of the group-III element oxide gas supply inlet is denoted by “M.sub.1”, wherein a diameter of the seed substrate is denoted by “k”, and wherein following Eqs. (1) to (4), 0°<θ<90° (1), 0.21≤S/k≤0.35 (2), 1.17≤(L.sub.1+M.sub.1)/k≤1.55 (3), k=2*(L.sub.1+M.sub.1)/tan θ+S (4) are satisfied.
MANUFACTURING METHOD FOR GROUP-III NITRIDE CRYSTAL
A manufacturing method for a group-III nitride crystal, the manufacturing method includes: preparing a seed substrate; increasing temperature of the seed substrate placed in a nurturing chamber; and supplying a group-III element oxide gas produced in a raw material chamber connected to the nurturing chamber by a connecting pipe and a nitrogen element-containing gas into the nurturing chamber to grow a group-III nitride crystal on the seed substrate, wherein a flow amount y of a carrier gas supplied into the raw material chamber at the temperature increase step satisfies following two relational equations (I) and (II), y<[1−k*H(Ts)]/[k*H(Ts)−j*H(Tg)]j*H(Tg)*t (I), y≥1.58*10.sup.−4*(22.4/28)S*F(N)/F(T) (II), wherein k represents an arrival rate to a saturated vapor pressure of a group-III element in the raw material chamber, Ts represents a temperature of the raw material chamber, Tg represents a temperature of the nurturing chamber, H(Ts) represents a saturated vapor pressure of the group-III element at the temperature Ts in the raw material chamber, H(Tg) represents a saturated vapor pressure of the group-III element at the temperature Tg in the nurturing chamber, j represents a corrective coefficient, t represents a sum of gas flow amounts flowing into the nurturing chamber from those other than the raw material chamber, S represents a cross-sectional area of the connecting pipe, F(N) represents a volumetric flow amount of the nitrogen element-containing gas supplied into the nurturing chamber, and F(T) represents a sum of volumetric flow amounts of gases supplied into the nurturing chamber from those other than the raw material chamber.
Wafer carrier and method
A wafer carrier includes a pocket sized and shaped to accommodate a wafer, the pocket having a base and a substantially circular perimeter, and a removable orientation marker, the removable orientation marker comprising an outer surface and an inner surface, the outer surface having an arcuate form sized and shaped to mate with the substantially circular perimeter of the pocket, and the inner surface comprising a flat face, wherein the removable orientation marker further comprises a notch at a first end of the flat face.
METHOD OF MANUFACTURING NITRIDE SEMICONDUCTOR DEVICE
A manufacturing method of a nitride semiconductor device includes: introducing a p type impurity into at least a part of an upper layer portion of a first nitride semiconductor layer to form a p type impurity introduction region; forming a second nitride semiconductor layer from an upper surface of the first nitride semiconductor layer so as to include the p type impurity introduction region; and performing an anneal treatment in a state where the second nitride semiconductor layer is formed on the first nitride semiconductor layer.
MANUFACTURING APPARATUS FOR GROUP-III COMPOUND SEMICONDUCTOR CRYSTAL
The manufacturing apparatus for a group-III compound semiconductor crystal according to the present disclosure comprises a reaction container. The reaction container has a raw material reaction section, a crystal growth section, and a gas flow channel. The raw material reaction section has a raw material reaction chamber, and a raw material gas nozzle. The crystal growth section has a substrate supporting member, and reactive gas nozzles. The gas flow channel includes a first flow channel, a second flow channel, and a connection portion. The first flow channel has a first opening, and the second flow channel has a second opening. The area of the second opening is configured to be larger than the area of the first opening. The connection portion connects the first opening and the second opening with each other. The gas flow channel forms a gas flow path in the reaction container. The substrate supporting member is disposed inside the gas flow path and located on the downstream side of the first opening.