Patent classifications
C30B33/10
Nanostructures fabricated by metal asisted chemical etching for antibactertial applications
The method comprises contacting a silicon substrate with a silver salt and an acid for a time effective to produce spikes having a first end disposed on the silicon substrate and a second end extending away from the silicon substrate. The spikes have a second end diameter of about 10 nm to about 200 nm, a height of about 100 nm to 10 micrometers, and a density of about 10 to 100 per square microns. The nanostructures provide antimicrobial properties and can be transferred to the surface of various materials such as polymers.
Method for manufacturing polycrystalline silicon fragment and method for managing surface metal concentration of polycrystalline silicon fragment
A method for manufacturing polycrystalline silicon fragments includes producing a polycrystalline silicon rod by the Siemens method; crushing the polycrystalline silicon rod to obtain polycrystalline silicon fragments; and cleaning by etching the polycrystalline silicon fragments in a cleaning tank. In the cleaning, small pieces of the polycrystalline silicon having controlled shapes and sizes are present in the cleaning tank and the weight change of the small pieces of the polycrystalline silicon before and after the etching is measured to thereby manage the cleaning.
Method for manufacturing polycrystalline silicon fragment and method for managing surface metal concentration of polycrystalline silicon fragment
A method for manufacturing polycrystalline silicon fragments includes producing a polycrystalline silicon rod by the Siemens method; crushing the polycrystalline silicon rod to obtain polycrystalline silicon fragments; and cleaning by etching the polycrystalline silicon fragments in a cleaning tank. In the cleaning, small pieces of the polycrystalline silicon having controlled shapes and sizes are present in the cleaning tank and the weight change of the small pieces of the polycrystalline silicon before and after the etching is measured to thereby manage the cleaning.
Indium phosphide substrate, semiconductor epitaxial wafer, and method for producing indium phosphide substrate
Provided is an indium phosphide substrate, a semiconductor epitaxial wafer, and a method for producing an indium phosphide substrate, which can satisfactorily suppress warpage of the back surface of the substrate. The indium phosphide substrate includes a main surface for forming an epitaxial crystal layer and a back surface opposite to the main surface, wherein the back surface has a SORI value of 2.5 μm or less, as measured with the back surface of the indium phosphide substrate facing upward.
Indium phosphide substrate, semiconductor epitaxial wafer, and method for producing indium phosphide substrate
Provided is an indium phosphide substrate, a semiconductor epitaxial wafer, and a method for producing an indium phosphide substrate, which can satisfactorily suppress warpage of the back surface of the substrate. The indium phosphide substrate includes a main surface for forming an epitaxial crystal layer and a back surface opposite to the main surface, wherein the back surface has a SORI value of 2.5 μm or less, as measured with the back surface of the indium phosphide substrate facing upward.
MODIFIED NANOCRYSTALLINE STRIP, PREPARATION METHOD THEREFOR, AND APPLICATION THEREOF
Disclosed are a modified nanocrystalline strip, a preparation method therefor, and an application thereof. The preparation method comprises: performing rolling treatment on a nanocrystalline strip with a double-sided adhesive adhered on one side to obtain a micro-crushed nanocrystalline strip; performing acid etching surface treatment on the obtained micro-crushed nanocrystalline strip; performing alkaline washing surface treatment on the nanocrystalline strip subjected to acid etching surface treatment; sequentially washing with water and washing with alcohol the nanocrystalline strip obtained by the alkaline washing surface treatment, and then drying same; and performing micro-oxidation treatment on the dried nanocrystalline strip to obtain a modified nanocrystalline strip.
MODIFIED NANOCRYSTALLINE STRIP, PREPARATION METHOD THEREFOR, AND APPLICATION THEREOF
Disclosed are a modified nanocrystalline strip, a preparation method therefor, and an application thereof. The preparation method comprises: performing rolling treatment on a nanocrystalline strip with a double-sided adhesive adhered on one side to obtain a micro-crushed nanocrystalline strip; performing acid etching surface treatment on the obtained micro-crushed nanocrystalline strip; performing alkaline washing surface treatment on the nanocrystalline strip subjected to acid etching surface treatment; sequentially washing with water and washing with alcohol the nanocrystalline strip obtained by the alkaline washing surface treatment, and then drying same; and performing micro-oxidation treatment on the dried nanocrystalline strip to obtain a modified nanocrystalline strip.
GROUP III NITRIDE SUBSTRATE, METHOD OF MAKING, AND METHOD OF USE
Embodiments of the present disclosure include techniques related to techniques for processing materials for manufacture of group-III metal nitride and gallium based substrates. More specifically, embodiments of the disclosure include techniques for growing large area substrates using a combination of processing techniques. Merely by way of example, the disclosure can be applied to growing crystals of GaN, AlN, InN, InGaN, AlGaN, and AlInGaN, and others for manufacture of bulk or patterned substrates. Such bulk or patterned substrates can be used for a variety of applications including optoelectronic and electronic devices, lasers, light emitting diodes, solar cells, photo electrochemical water splitting and hydrogen generation, photodetectors, integrated circuits, and transistors, and others.
GROUP III NITRIDE SUBSTRATE, METHOD OF MAKING, AND METHOD OF USE
Embodiments of the present disclosure include techniques related to techniques for processing materials for manufacture of group-III metal nitride and gallium based substrates. More specifically, embodiments of the disclosure include techniques for growing large area substrates using a combination of processing techniques. Merely by way of example, the disclosure can be applied to growing crystals of GaN, AlN, InN, InGaN, AlGaN, and AlInGaN, and others for manufacture of bulk or patterned substrates. Such bulk or patterned substrates can be used for a variety of applications including optoelectronic and electronic devices, lasers, light emitting diodes, solar cells, photo electrochemical water splitting and hydrogen generation, photodetectors, integrated circuits, and transistors, and others.
HIGH QUALITY SILICON CARBIDE SEED CRYSTAL, SILICON CARBIDE CRYSTAL, SILICON CARBIDE SUBSTRATE, AND PREPARATION METHOD THEREFOR
Provided are a high quality silicon carbide seed crystal, a silicon carbide crystal, a silicon carbide substrate, and a preparation method therefor. A high quality silicon carbide seed crystal is prepared, the dopant concentrations of a thermal insulation material, a graphite crucible, and a silicon carbide powder material are controlled, a specific crystal growth process and a wafer machining means are integrated, and a high quality silicon carbide substrate is obtained. The obtained silicon carbide substrate has a high crystalline quality and an extremely low amount of micropipes, screw dislocation density, and compound dislocation density; said substrate also has an extremely low p-type dopant concentration, exhibits superior electrical performance, and has a high surface quality.