Patent classifications
C30B33/12
METHOD FOR MANUFACTURING SiC SUBSTRATE
An object to be solved by the present invention is to provide a new technology for producing a SiC substrate in which strain is removed and capable of achieving a flat surface as flat as a surface that has been subjected to CMP. The present invention, which solves the above object, is a method for producing a SiC substrate, the method including an etching step of etching a SiC substrate having arithmetic average roughness (Ra) of a surface of equal to or less than 100 nm in an atmosphere containing Si element and C element.
SiC SUBSTRATE, SiC EPITAXIAL SUBSTRATE, SiC INGOT AND PRODUCTION METHODS THEREOF
The present invention addresses the problem of providing a novel technology which enables the achievement of a high-quality SiC substrate, a high-quality SiC epitaxial substrate, and a high-quality SiC ingot. The present invention is a method for producing an SiC substrate 11, said method comprising a heat treatment step S1 for heat treating an SiC base substrate 10, said heat treatment step S1 comprising two or more steps among the steps (a), (b) and (c) described below. (a) a strained layer removal step S11 for removing a strained layer 101 of the SiC base substrate 10. (b) a bunching removal step S12 for removing macro-step bunching (MSB) on the SiC base substrate 10. (c) a basal plane dislocation reduction step S13 for forming a growth layer 105, in which basal plane dislocations (BPD) are reduced, on the SiC base substrate 10.
Epitaxial layers in source/drain contacts and methods of forming the same
A method includes providing a p-type S/D epitaxial feature and an n-type source/drain (S/D) epitaxial feature, forming a semiconductor material layer over the n-type S/D epitaxial feature and the p-type S/D epitaxial feature, processing the semiconductor material layer with a germanium-containing gas, where the processing of the semiconductor material layer forms a germanium-containing layer over the semiconductor material layer, etching the germanium-containing layer, where the etching of the germanium-containing layer removes the germanium-containing layer formed over the n-type S/D epitaxial feature and the semiconductor material layer formed over the p-type S/D epitaxial feature, and forming a first S/D contact over the semiconductor material layer remaining over the n-type S/D epitaxial feature and a second S/D contact over the p-type S/D epitaxial feature. The semiconductor material layer may have a composition similar to that of the n-type S/D epitaxial feature.
Epitaxial layers in source/drain contacts and methods of forming the same
A method includes providing a p-type S/D epitaxial feature and an n-type source/drain (S/D) epitaxial feature, forming a semiconductor material layer over the n-type S/D epitaxial feature and the p-type S/D epitaxial feature, processing the semiconductor material layer with a germanium-containing gas, where the processing of the semiconductor material layer forms a germanium-containing layer over the semiconductor material layer, etching the germanium-containing layer, where the etching of the germanium-containing layer removes the germanium-containing layer formed over the n-type S/D epitaxial feature and the semiconductor material layer formed over the p-type S/D epitaxial feature, and forming a first S/D contact over the semiconductor material layer remaining over the n-type S/D epitaxial feature and a second S/D contact over the p-type S/D epitaxial feature. The semiconductor material layer may have a composition similar to that of the n-type S/D epitaxial feature.
Porous wire-in-tube structures
A method for fabricating porous wire-in-tube (WiT) nanostructures including forming a first porous core-shell nanostructure, forming a second porous core-shell nanostructure by increasing thickness and porosity of the porous core-shell nanostructure, and forming a porous WiT nanostructure by etching the second porous core-shell nanostructure. Forming the first porous core-shell nanostructure may include forming a porous layer on a semi-conductive core by depositing a first plurality of particles on the semi-conductive core and generating an initial porous semi-conductive core by etching the semi-conductive core simultaneously with forming the porous layer.
Porous wire-in-tube structures
A method for fabricating porous wire-in-tube (WiT) nanostructures including forming a first porous core-shell nanostructure, forming a second porous core-shell nanostructure by increasing thickness and porosity of the porous core-shell nanostructure, and forming a porous WiT nanostructure by etching the second porous core-shell nanostructure. Forming the first porous core-shell nanostructure may include forming a porous layer on a semi-conductive core by depositing a first plurality of particles on the semi-conductive core and generating an initial porous semi-conductive core by etching the semi-conductive core simultaneously with forming the porous layer.
Semiconductor Photoelectrode and Method for Manufacturing Same
A semiconductor photoelectrode includes a conductive or insulating substrate, a semiconductor thin film disposed on a surface of substrate and having an uneven structure on the surface, a catalytic layer disposed along the uneven structure on the surface of semiconductor thin film, and a protective layer disposed to cover a back surface of substrate and side surfaces of substrate and semiconductor thin film.
Semiconductor Photoelectrode and Method for Manufacturing Same
A semiconductor photoelectrode includes a conductive or insulating substrate, a semiconductor thin film disposed on a surface of substrate and having an uneven structure on the surface, a catalytic layer disposed along the uneven structure on the surface of semiconductor thin film, and a protective layer disposed to cover a back surface of substrate and side surfaces of substrate and semiconductor thin film.
Method of forming titanium nitride films with (200) crystallographic texture
A substrate processing method is described for forming a titanium nitride material that may be used for superconducting metallization or work function adjustment applications. The substrate processing method includes depositing by vapor phase deposition at least one monolayer of a first titanium nitride film on a substrate, and treating the first titanium nitride film with plasma excited hydrogen-containing gas, where the first titanium nitride film is polycrystalline and the treating increases the (200) crystallographic texture of the first titanium nitride film. The method further includes depositing by vapor phase deposition at least one monolayer of a second titanium nitride film on the treated at least one monolayer of the first titanium nitride film, and treating the at least one monolayer of the second titanium nitride film with plasma excited hydrogen-containing gas.
HYDROGEN FLUORIDE VAPOR PHASE CORROSION APPARATUS AND METHOD
A hydrogen fluoride vapor phase corrosion apparatus comprises a reaction chamber, a vapor phase hydrogen fluoride source, and a hydrogen fluoride vapor phase gain device. The reaction chamber is provided with a first gas inlet that is connected to the vapor phase hydrogen fluoride source, and a second gas inlet being connected to the hydrogen fluoride vapor phase gain device. The hydrogen fluoride vapor phase gain device is configured to perform a gas-liquid mixing and vaporizing of a prescribed organic liquid and introduce it into the reaction chamber through the second gas inlet after a wafer placed in the reaction chamber reacts with a vapor phase hydrogen fluoride admitted from the first gas inlet, so that the vaporized organic liquid and residual water in the reaction chamber form an azeotropic mixture that evaporates or volatilizes more readily than water.