Patent classifications
C04B37/026
Sintered body, substrate, circuit board, and manufacturing method of sintered body
A sintered body includes a crystal grain containing silicon nitride, and a grain boundary phase. If dielectric losses of the sintered body are measured while applying an alternating voltage to the sintered body and continuously changing a frequency of the alternating voltage from 50 Hz to 1 MHz, an average value ε.sub.A of dielectric losses of the sintered body in a frequency band from 800 kHz to 1 MHz and an average value ε.sub.B of dielectric losses of the sintered body in a frequency band from 100 Hz to 200 Hz satisfy an expression |ε.sub.A−ε.sub.B|≤0.1.
Brazed joint and semiconductor processing chamber component having the same
Methods of forming a metallic-ceramic brazed joint are disclosed herein. The method of forming the brazed joint includes deoxidizing the surface of metallic components, assembling the joint, heating the joint to fuse the joint components, and cooling the joint. In certain embodiments, the brazed joint includes a conformal layer. In further embodiments, the brazed joint has features in order to reduce stress concentrations within the joint.
Method for producing a metal-ceramic substrate with at least one via
A method for producing a metal-ceramic substrate with electrically conductive vias includes: attaching a first metal layer in a planar manner to a first surface side of a ceramic layer; after attaching the first metal layer, introducing a copper hydroxide or copper acetate brine into holes in the ceramic layer delimiting a via, to form an assembly; converting the copper hydroxide or copper acetate brine into copper oxide; subjecting the assembly to a high-temperature step above 500° C. in which the copper oxide forms a copper body in the holes; and after converting the copper hydroxide or copper acetate brine into the copper oxide, attaching a second metal layer in a planar manner to a second surface side of the ceramic layer opposite the first surface side. The copper body produces an electrically conductive connection between the first and the second metal layers.
CERAMIC/COPPER/GRAPHENE ASSEMBLY AND METHOD FOR MANUFACTURING SAME, AND CERAMIC/COPPER/GRAPHENE JOINING STRUCTURE
In a ceramic/copper/graphene assembly, a ceramic member, a copper member formed of copper or a copper alloy, and a graphene-containing carbonaceous member containing a graphene aggregate are joined. At a joining interface between the copper member and the graphene-containing carbonaceous member, an active metal carbide layer containing a carbide of one or more kinds of active metals selected from Ti, Zr, Nb, and Hf is formed on a side of the graphene-containing carbonaceous member, and a Mg solid solution layer having Mg dissolved in a matrix phase of Cu is formed between the active metal carbide layer and the copper member.
METHOD FOR PRODUCING A METAL-CERAMIC SUBSTRATE AND FURNACE
The invention relates to a method for producing a metal-ceramic substrate and to a furnace suitable for carrying out the method. With the method, a metal-ceramic substrate with increased thermal and current conductivity can be obtained. The method comprises the steps of providing a stack containing a ceramic body, a metal foil, and a solder material in contact with the ceramic body and the metal foil, the solder material comprising a metal having a melting point of at least 700° C., a metal having a melting point of less than 700° C., and an active metal, and heating the stack, the stack passing through a heating zone for heating.
METHOD FOR PRODUCING A METAL-CERAMIC SUBSTRATE
The present invention relates to a method for producing a metal-ceramic substrate. The method has the following steps: providing a stack containing a ceramic body, a metal foil, and a solder material in contact with the ceramic body and the metal foil, wherein the solder material has: a metal having a melting point of at least 700° C., a metal having a melting point of less than 700° C., and an active metal; and heating the stack, wherein at least one of the following conditions is satisfied: the high temperature heating duration is no more than 60 min; the peak temperature heating duration is no more than 30 min; the heating duration is no more than 60 min.
SEMICONDUCTOR DEVICE
A semiconductor device includes: an insulated circuit substrate including first and second conductive layers on a top surface side; a first semiconductor chip mounted on the first conductive layer; a second semiconductor chip mounted on the second conductive layer; a printed circuit board including a first lower-side wiring layer arranged to be opposed to the first semiconductor chip, and a second lower-side wiring layer arranged to be opposed to the second semiconductor chip, the printed circuit board being provided with a curved part curved toward the insulated circuit substrate; a first connection member arranged to connect the first semiconductor chip with the first lower-side wiring layer; a second connection member arranged to connect the second semiconductor chip with the second lower-side wiring layer; and a third connection member arranged to connect the first conductive layer with the second lower-side wiring layer at the curved part.
ELECTRONIC APPARATUS AND METHOD FOR MANUFACTURING ELECTRONIC APPARATUS
Provided is an electronic apparatus including a metal wiring. The metal wiring includes a plurality of first regions covered with a solder layer, a second region provided between two first regions of the plurality of first regions, and a third region having a nitrogen amount of 20 atoms % or more. An oxygen amount is largest in the second region, followed by at least one of the plurality of first regions, and then by the third region. The nitrogen amount may be largest in the third region, followed by at least one of the plurality of first regions, and then by the second region.
Silicon nitride substrate and silicon nitride circuit board
In a silicon nitride substrate including a silicon nitride sintered body including silicon nitride crystal grains and a grain boundary phase, a plate thickness of the silicon nitride substrate is 0.4 mm or les, and a percentage of a number of the silicon nitride crystal grains including dislocation defect portions inside the silicon nitride crystal grains in a 50 μm×50 μm observation region of any cross section or surface of the silicon nitride sintered body is not less than 0% and not more than 20%. Etching resistance can be increased when forming the circuit board.
COPPER/CERAMIC ASSEMBLY AND INSULATED CIRCUIT BOARD
This copper/ceramic bonded body includes: a copper member made of copper or a copper alloy; and a ceramic member made of aluminum-containing ceramics, the copper member and the ceramic member are bonded to each other, in which, at a bonded interface between the copper member and the ceramic member, an active metal compound layer containing an active metal compound that is a compound of one or more active metals selected from Ti, Zr, Nb, and Hf is formed on a ceramic member side, and in the active metal compound layer Al and Cu are present at a grain boundary of the active metal compound.