Patent classifications
C04B2237/708
CERAMIC SUBSTRATE, CERAMIC DIVIDED SUBSTRATE, AND METHOD FOR MANUFACTURING CERAMIC SUBSTRATE
A ceramic substrate is provided with a flat plate-shaped insulating base including a ceramic, a first brazing material layer provided on a first main surface of the insulating base, a second brazing material layer provided on a second main surface of the insulating base, a first metal layer including a metal and being fixed through the first brazing material layer to the insulating base on a first main surface-side, and a second metal layer including a metal and being fixed through the second brazing material layer to the insulating base on a second main surface-side. A difference between a thickness of the first brazing material layer and a thickness of the second brazing material layer at a given point is 4.0 .Math.m or less.
MULTI-LAYER CERAMIC PLATE DEVICE
An electrostatic chuck includes a ceramic top plate layer made of a beryllium oxide material, a ceramic bottom plate layer made of a beryllium oxide material, a ceramic middle plate layer disposed between the ceramic top plate layer and the ceramic bottom plate layer, an electrode layer disposed between the ceramic top plate layer and the ceramic middle plate layer, and a heater layer disposed between the ceramic middle plate layer and the ceramic bottom plate layer. The electrode layer joins and hermetically seals the ceramic top plate layer to the ceramic middle plate layer, and the heater layer joins and hermetically seals the ceramic middle plate layer to the ceramic bottom plate layer.
Ceramic circuit board, method for manufacturing ceramic circuit board, and module using ceramic circuit board
A ceramic circuit substrate and power module with excellent heat cycle resistance characteristics, which is formed by bonding a ceramic substrate and a copper plate via a brazing material including Ag, Cu, and an active metal, wherein the bond void fraction is no greater than 1.0% and the diffusion distance of the Ag, which is a brazing material component, is 5-20 μm. Also, a method for manufacturing a ceramic circuit substrate characterized in that the heating time in a temperature range 400-700° C. in a process for raising the temperature to a bonding temperature is 5-30 minutes and bonding is performed by maintaining the bonding temperature at 720-800° C. for 5-30 minutes.
BONDED SUBSTRATE AND BONDED SUBSTRATE MANUFACTURING METHOD
The bonded substrate includes the silicon nitride ceramic substrate, a copper plate, the bonding layer, and penetrating regions. The copper plate and the bonding layer are patterned into a predetermined shape, and are disposed over a main surface of the silicon nitride ceramic substrate. The bonding layer bonds the copper plate to the main surface of the silicon nitride ceramic substrate. The penetrating regions each include one or more penetrating portions penetrating continuously from the main surface of the substrate into the silicon nitride ceramic substrate to a depth of 3 μm or more and 20 μm or less, and contain silver, and the number of penetrating regions present per square millimeter of the main surface of the substrate is one or more and 30 or less.
DBC SUBSTRATE FOR POWER SEMICONDUCTOR DEVICES, METHOD FOR FABRICATING A DBC SUBSTRATE AND POWER SEMICONDUCTOR DEVICE HAVING A DBC SUBSTRATE
A DBC substrate for power semiconductor devices includes a ceramic workpiece of a non-oxide ceramic having first and second opposing main sides, the ceramic workpiece having a thickness of 10 μm or more measured between the first and second main sides, a copper-containing layer disposed over the first main side, the copper-containing layer having a thickness of 5 μm or more, and an intermediate layer comprising Al.sub.2O.sub.3 disposed between the ceramic workpiece and the copper-containing layer.
Corrosion-resistant components and methods of making
A corrosion-resistant component configured for use with a semiconductor processing reactor, the corrosion-resistant component comprising: a) a ceramic insulating substrate; and, b) a white corrosion-resistant non-porous outer layer associated with the ceramic insulating substrate, the white corrosion-resistant non-porous outer layer having a thickness of at least 50 μm, a porosity of at most 1%, and a composition comprising at least 15% by weight of a rare earth compound based on total weight of the corrosion-resistant non-porous layer; and, c) an L* value of at least 90 as measured on a planar surface of the white corrosion-resistant non-porous outer layer. Methods of making are also disclosed.
Multilayered ceramic substrate and method for manufacturing same
The present disclosure relates to a multilayer ceramic substrate preparation method. The multilayer ceramic substrate preparation method according to the present disclosure includes firing a plurality of ceramic green sheets, to create a plurality of ceramic thin films; forming a via hall in each of the plurality of ceramic thin films; filling the via hall of the plurality of ceramic thin films with conductive paste, and heat treating the via hall filled with the conductive paste, to form a via electrode; printing a pattern on a cross section of each of the plurality of ceramic thin films, and heat treating the printed pattern, to form an inner electrode; applying a bonding agent on the cross section of each of the ceramic thin films excluding an uppermost ceramic thin film of the plurality of ceramic thin films; aligning and laminating each of the plurality of ceramic thin films such that each of the plurality of ceramic thin films is electrically connected through the via electrode and the inner electrode; and firing or heat treating the laminated plurality of ceramic thin films.
SILICON NITRIDE CIRCUIT BOARD AND ELECTRONIC COMPONENT MODULE
A silicon nitride circuit board includes a silicon nitride substrate, a first copper layer over one surface of the silicon nitride substrate, and a second copper layer over the other surface of the silicon nitride substrate, in which a fracture toughness value Kc of the silicon nitride substrate is equal to or more than 5.0 MPa.Math.m.sup.0.5 and equal to or less than 10.0 MPa.Math.m.sup.0.5, and when a coefficient of linear expansion of the silicon nitride substrate is α.sub.B (/° C.), a Young's modulus of the silicon nitride substrate is E.sub.B (GPa), a coefficient of linear expansion of the first copper layer is α.sub.A (/° C.), and a coefficient of linear expansion of the second copper layer is α.sub.C (/° C.), each of a heat shock parameter HS1 and a heat shock parameter HS2 is equal to or more than 1.30 GPa and equal to or less than 2.30 GPa.
COPPER/CERAMIC JOINED BODY, INSULATING CIRCUIT SUBSTRATE, COPPER/CERAMIC JOINED BODY PRODUCTION METHOD, AND INSULATING CIRCUIT SUBSTRATE PRODUCTION METHOD
This copper/ceramic bonded body includes: a copper member made of copper or a copper alloy; and a ceramic member made of silicon nitride, wherein the copper member and the ceramic member are bonded to each other, a Mg—N compound phase extending from a ceramic member side to a copper member side is present at a bonded interface between the copper member and the ceramic member, and at least a part of the Mg—N compound phase enters into the copper member.
Joined material and method of manufacturing same
A joined material and a method of manufacturing the joined material are provided which enable a metal layer and a carbon material layer to be easily joined to each other while making the thickness of the metal layer larger and which can inhibit failure. A joined material includes a CFC layer (3) and a tungsten layer (4) that are joined to each other. A sintered tungsten carbide layer (5), a mixed layer (6) of SiC and WC, and SiC and WC (7) that have been sintered while intruding into the CFC layer (3), are formed between the CFC layer (3) and the tungsten layer (4), and these layers (3, 4, 5, 6, and 7) are joined to each other by sintering.