A film-forming apparatus having a simple and downsized structure is provided. The film-forming apparatus includes at least one target having an opposing face that opposes a substrate, a plurality of target holders each detachably holding the target, a cooling unit that cools a plurality of the target holders, and at least one cooling panel. The at least one cooling panel includes a held part held by the target holder, and a heat receiving part having a heat receiving face that opposes the substrate with the held part held by the target holder and receives radiation heat emitted from the substrate. The held part transfers heat from the heat receiving face to the target holder. Each target holder selectively holds the target or the cooling panel.

The method of forming a nitride semiconductor film includes intermittently sputtering a target of gallium nitride inside a vacuum chamber containing nitrogen and argon, and depositing sputtered particles of the gallium nitride that are scattered from the target inside the vacuum chamber, on a substrate having a temperature of 560 degrees C. or higher and 650 degrees C. or lower. A ratio of a flow rate of the nitrogen to a sum of the flow rate of the nitrogen and a flow rate of the argon supplied to the vacuum chamber is 6% or higher and 18% or lower.

A chip carrier device includes a frame, a chip support and a limiter. The chip support is disposed on the frame, and includes a supporting film for chips to be adhered thereto. A peripheral portion of the supporting film is attached to a surrounding frame part of the frame. A crossing portion of the supporting film passes through a center of the supporting film, and interconnects two opposite points of the peripheral portion. The supporting film is formed with through holes. The limiter includes a limiting part that interconnects two opposite points of the surrounding frame part, that is positioned corresponding to the crossing portion, and that is positioned on one side of the supporting film where the chips are to be arranged.

A semiconductor device and a method of fabricating the device are disclosed. The method of forming a metal layer includes: placing a substrate in a sputtering chamber; forming a first metal sub-layer on the substrate by performing a magnetron sputtering process; and forming a second metal sub-layer on the first metal sub-layer by performing another magnetron sputtering process and concurrently introducing a heated gas stream in the sputtering chamber, wherein the first metal sub-layer and the second metal sub-layer together constitute the metal layer and are each formed of aluminum doped with copper. The metal layer resulting from this method contains uniformly-sized small crystal grains separated from one another by minimal gaps between their grain boundaries. This imparts to the metal layer high surface flatness with fewer undesired bumps and hence good appearance, resulting in an increase in its yield.

A thin film formation apparatus includes a chamber, a platen disposed within the chamber, a heater configured to heat the platen within the chamber, a gas inlet communicating with an interior of the chamber and configured to supply a reducing gas and inert gas to the interior of the chamber, a target disposed within the chamber and spatially separated from the platen, and a microwave plasma source disposed adjacent to the target. The reducing gas includes at least one of hydrogen (H.sub.2) and deuterium (D.sub.2)

Embodiments disclosed herein generally relate to a substrate temperature monitoring system in a substrate support assembly. In one embodiment, the substrate support assembly includes a lift pin. The lift pin has a body. The body has an interior passage and a rounded top surface configured for contacting a substrate when in use. A substrate temperature sensor disposed in the interior passage.

A wafer processing apparatus is provided. The apparatus includes: a heating plate through which vacuum ports are formed; a plurality of temperature sensors; a heating device configured to heat the heating plate; first and second power supplies; temperature controllers to generate first and second feedback temperature control signals for controlling power output power supplies based on measurement values generated by the temperature sensors; an electronic pressure regulator configured to provide vacuum pressure for fixing a wafer to the plurality of vacuum ports; and a wafer chucking controller configured to control the electronic pressure regulator, and generate a feedback pressure control signal for controlling the electronic pressure regulator based on the first and second feedback temperature control signals.

One or more embodiments described herein generally relate to methods and systems for forming films on substrates in semiconductor processes. In embodiments described herein, process chamber is provided that includes a lid plate having a plurality of cooling channels formed therein, a pedestal, the pedestal having a plurality of cooling channels formed therein, and a showerhead, wherein the showerhead comprises a plurality of segments and each segment is at least partially surrounded by a shield.

In one embodiment, an adapter plate for a deposition chamber is provided. The adapter plate comprises a body, a mounting plate centrally located on the body, a first annular portion extending longitudinally from a first surface of the mounting plate and disposed radially inward from an outer surface of the mounting plate, a second annular portion extending longitudinally from an opposing second surface of the mounting plate and disposed radially inward from the outer surface of the mounting plate, and a mirror-finished surface disposed on the interior of the second annular portion, the mirror-finished surface having an average surface roughness of 6 Ra or less.

The present disclosure relates to semiconductor based Josephson junctions and their applications within the field of quantum computing, in particular a tuneable Josephson junction device has been used to construct a gateable transmon qubit. One embodiment relates to a Josephson junction comprising an elongated hybrid nanostructure comprising superconductor and semiconductor materials and a weak link, wherein the weak link is formed by a semiconductor segment of the elongated hybrid nanostructure wherein the superconductor material has been removed to provide a semiconductor weak link.