A method is disclosed for making semiconductor films from a eutectic alloy comprising a metal and a semiconductor. Through heterogeneous nucleation said film is deposited at a deposition temperature on relatively inexpensive buffered substrates, such as glass. Specifically said film is vapor deposited at a fixed temperature in said deposition temperature where said deposition temperature is above a eutectic temperature of said eutectic alloy and below a temperature at which the substrate softens. Such films could have widespread application in photovoltaic and display technologies.

A method is disclosed for making semiconductor films from a eutectic alloy comprising a metal and a semiconductor. Through heterogeneous nucleation said film is deposited at a deposition temperature on relatively inexpensive buffered substrates, such as glass. Specifically said film is vapor deposited at a fixed temperature in said deposition temperature where said deposition temperature is above a eutectic temperature of said eutectic alloy and below a temperature at which the substrate softens. Such films could have widespread application in photovoltaic and display technologies.

A new set of branched nanowire or nanotree structures and their fabrication process. Some structures have one or more of the following distinctions from other branched nanowires: (1) the trunk and branch diameter and branching number density can be changed along the trunk's length; (2) the branch's azimuthal direction can be controlled along the trunk's length; (3) the branch's diameter can be modulated along its length; (4) the crystal orientation and branches of the ensemble of nanowires can be aligned on a non-epitaxially matched substrate. The structures are made by a geometrically controlled kinetic growth method.

A new set of branched nanowire or nanotree structures and their fabrication process. Some structures have one or more of the following distinctions from other branched nanowires: (1) the trunk and branch diameter and branching number density can be changed along the trunk's length; (2) the branch's azimuthal direction can be controlled along the trunk's length; (3) the branch's diameter can be modulated along its length; (4) the crystal orientation and branches of the ensemble of nanowires can be aligned on a non-epitaxially matched substrate. The structures are made by a geometrically controlled kinetic growth method.

A method of forming a semiconductor structure is provided. The method includes etching a trench in a template layer over a substrate, forming a seed structure over a bottom surface of the trench, forming a dielectric cap over the seed structure, and growing a single crystal semiconductor structure within the trench using a vapor liquid solid epitaxy growth process. The single crystal semiconductor structure is grown from a liquid-solid interface between the seed structure and the bottom surface of the trench.

A semiconductor device is provided. The semiconductor device includes a template layer disposed over a substrate and having a trench therein, a buffer structure disposed over a bottom surface of the trench and comprising a metal oxide, a single crystal semiconductor structure disposed within the trench and over the buffer structure and a gate structure disposed over a channel region of the single crystal semiconductor structure.

A mixed semiconductor-superconductor platform is fabricated in phases. In a masking phase, a dielectric mask is formed on a substrate, such that the dielectric mask leaves one or more regions of the substrate exposed. In a selective area growth phase, a semiconductor material is selectively grown on the substrate in the one or more exposed regions. In a superconductor growth phase, a layer of superconducting material is formed, at least part of which is in direct contact with the selectively grown semiconductor material. The mixed semiconductor-superconductor platform comprises the selectively grown semiconductor material and the superconducting material in direct contact with the selectively grown semiconductor material.

A mixed semiconductor-superconductor platform is fabricated in phases. In a masking phase, a dielectric mask is formed on a substrate, such that the dielectric mask leaves one or more regions of the substrate exposed. In a selective area growth phase, a semiconductor material is selectively grown on the substrate in the one or more exposed regions. In a superconductor growth phase, a layer of superconducting material is formed, at least part of which is in direct contact with the selectively grown semiconductor material. The mixed semiconductor-superconductor platform comprises the selectively grown semiconductor material and the superconducting material in direct contact with the selectively grown semiconductor material.

This disclosure describes methods, apparatus, and systems related to non-contiguous channel bonding. A device may determine a wireless communication channel having one or more subchannels in accordance with one or more communication standards. The device may determine instructions to perform one or more clear channel assessments (CCAs) on at least one of the one or more subchannels. The device may cause to send the instructions to one or more first devices. The device may identify a frame received from at least one of the one or more first devices, wherein the frame is received on at least one available subchannel of the one or more subchannels.

This disclosure describes methods, apparatus, and systems related to non-contiguous channel bonding. A device may determine a wireless communication channel having one or more subchannels in accordance with one or more communication standards. The device may determine instructions to perform one or more clear channel assessments (CCAs) on at least one of the one or more subchannels. The device may cause to send the instructions to one or more first devices. The device may identify a frame received from at least one of the one or more first devices, wherein the frame is received on at least one available subchannel of the one or more subchannels.