The present disclosure relates to semiconductor based Josephson junctions and their applications within the field of quantum computing, in particular a tuneable Josephson junction device has been used to construct a gateable transmon qubit. One embodiment relates to a Josephson junction comprising an elongated hybrid nanostructure comprising superconductor and semiconductor materials and a weak link, wherein the weak link is formed by a semiconductor segment of the elongated hybrid nanostructure wherein the superconductor material has been removed to provide a semiconductor weak link.

The present disclosure relates to semiconductor based Josephson junctions and their applications within the field of quantum computing, in particular a tuneable Josephson junction device has been used to construct a gateable transmon qubit. One embodiment relates to a Josephson junction comprising an elongated hybrid nanostructure comprising superconductor and semiconductor materials and a weak link, wherein the weak link is formed by a semiconductor segment of the elongated hybrid nanostructure wherein the superconductor material has been removed to provide a semiconductor weak link.

Provided herein are methods for forming one or more silicon nanostructures, such as silicon nanotubes, and a silica-containing glass substrate. As a result of the process used to prepare the silicon nanostructures, the silica-containing glass substrate comprises one or more nanopillars and the one or more silicon nanostructures extend from the nanopillars of the silica-containing glass substrate. The silicon nanostructures include nanotubes and optionally nanowires. A further aspect is a method for preparing silicon nanostructures on a silica-containing glass substrate. The method includes providing one or more metal nanoparticles on a silica-containing glass substrate and then performing reactive ion etching of the silica-containing glass substrate under conditions that are suitable for the formation of one or more silicon nanostructures.

Provided herein are methods for forming one or more silicon nanostructures, such as silicon nanotubes, and a silica-containing glass substrate. As a result of the process used to prepare the silicon nanostructures, the silica-containing glass substrate comprises one or more nanopillars and the one or more silicon nanostructures extend from the nanopillars of the silica-containing glass substrate. The silicon nanostructures include nanotubes and optionally nanowires. A further aspect is a method for preparing silicon nanostructures on a silica-containing glass substrate. The method includes providing one or more metal nanoparticles on a silica-containing glass substrate and then performing reactive ion etching of the silica-containing glass substrate under conditions that are suitable for the formation of one or more silicon nanostructures.

A method for producing a material based on silicon nanowires is provided. The method includes the steps of: i) bringing into contact, in an inert atmosphere, a sacrificial support based on a halogenide, a carbonate, a sulfate or a nitrate of an alkali metal, an alkaline earth metal or a transition metal having metal nanoparticles, with the pyrolysis vapours of a silicon source having a silane compound, by which silicon nanowires are deposited on the sacrificial support; and optionally ii) eliminating the sacrificial support and recovering the silicon nanowires produced in step ii).

A method for producing a material based on silicon nanowires is provided. The method includes the steps of: i) bringing into contact, in an inert atmosphere, a sacrificial support based on a halogenide, a carbonate, a sulfate or a nitrate of an alkali metal, an alkaline earth metal or a transition metal having metal nanoparticles, with the pyrolysis vapours of a silicon source having a silane compound, by which silicon nanowires are deposited on the sacrificial support; and optionally ii) eliminating the sacrificial support and recovering the silicon nanowires produced in step ii).

A mixed semiconductor-superconductor platform is fabricated in phases. In a masking phase, a dielectric mask is formed on a substrate, such that the dielectric mask leaves one or more regions of the substrate exposed. In a selective area growth phase, a semiconductor material is selectively grown on the substrate in the one or more exposed regions. in a superconductor growth phase, a layer of superconducting material is formed, at least part of which is in direct contact with the selectively grown semiconductor material. The mixed semiconductor-superconductor platform comprises the selectively grown semiconductor material and the superconducting material in direct contact with the selectively grown semiconductor material.

The present disclosure relates to a method for producing a network of interconnected nanostructures comprising the steps of: providing a substantially plane substrate; growing a plurality of elongated nanostructures from the substrate; kinking the growth direction of at least a part of the nanostructures such that at least part of the kinked nanostructures are growing in a network plane parallel to the substrate, and creating one or more network(s) of interconnected kinked nanostructures in the network plane, wherein a dielectric support layer is provided below the network plane to support said network(s) of interconnected nanostructures.

The present disclosure relates to a method for producing a network of interconnected nanostructures comprising the steps of: providing a substantially plane substrate; growing a plurality of elongated nanostructures from the substrate; kinking the growth direction of at least a part of the nanostructures such that at least part of the kinked nanostructures are growing in a network plane parallel to the substrate, and creating one or more network(s) of interconnected kinked nanostructures in the network plane, wherein a dielectric support layer is provided below the network plane to support said network(s) of interconnected nanostructures.

This disclosure describes methods, apparatus, and systems related to non-contiguous channel bonding. A device may determine a wireless communication channel having one or more subchannels in accordance with one or more communication standards. The device may determine instructions to perform one or more clear channel assessments (CCAs) on at least one of the one or more subchannels. The device may cause to send the instructions to one or more first devices. The device may identify a frame received from at least one of the one or more first devices, wherein the frame is received on at least one available subchannel of the one or more subchannels.