Patent classifications
C30B25/186
METHOD AND WAFER PROCESSING FURNACE FOR FORMING AN EPITAXIAL STACK OF SEMICONDUCTOR EPITAXIAL LAYERS
A method and a wafer processing furnace for forming an epitaxial stack on a plurality of substrates is provided. In a preferred embodiment, the method comprises providing plurality of substrates to a process chamber. A plurality of deposition cycles are executed, thereby forming the epitaxial stack on the plurality of substrates. The epitaxial comprises a plurality of epitaxial pairs, each pair comprising a first epitaxial layer and a second epitaxial layer. The deposition cycle comprises a first deposition pulse and a second deposition pulse. The first deposition pulse comprises a provision of a first reaction gas mixture to the process chamber, thereby forming the first epitaxial layer and the second deposition pulse comprises a provision of a second reaction gas mixture to the process chamber, thereby forming the second epitaxial layer
COMPOSITE SUBSTRATES INCLUDING EPITAXIAL MONOCRYSTALLINE PIEZOELECTRIC LAYERS BONDED TO SUBSTRATES, AND ACOUSTIC WAVE DEVICES FORMED WITH SUCH COMPOSITE SUBSTRATES
A composite substrate includes a final substrate, and a piezoelectric material directly molecularly bonded to the final substrate at a first interface. The piezoelectric material comprises an epitaxial layer, but does not comprise a seed layer. Additional composite substrates include a final substrate, and a piezoelectric material directly molecularly bonded to the final substrate at a first interface. The piezoelectric material comprises an epitaxial layer. The composite substrate further includes a seed layer on which the piezoelectric material has been epitaxially grown. The seed layer is disposed on a side of the epitaxial layer opposite the final substrate. An acoustic wave device comprises such a composite substrate with at least one electrode on a surface of the piezoelectric layer opposite the substrate.
Aluminum nitride laminate member and aluminum nitride layer
There is provided an aluminum nitride laminate member including: a sapphire substrate having a base surface on which bumps are distributed periodically, each bump having a height of smaller than or equal to 500 nm; and an aluminum nitride layer provided on the base surface and having a surface on which protrusions are formed above the apices of the bumps.
Aluminum nitride laminate member and light-emitting device
There is provided an aluminum nitride laminate member including: a sapphire substrate having a base surface on which bumps are distributed periodically, each bump having a height of smaller than or equal to 500 nm; and an aluminum nitride layer grown on the base surface and having a flat surface, there being substantially no voids in the aluminum nitride layer.
METHOD FOR REDUCING A LATERAL GROWTH OF CRYSTALS
The present invention relates to a method for reducing lateral growth as well as growth of the bottom surface of crystals in a crystal growing process, wherein before the crystal seed undergoes a growing process the method includes a step of wrapping the crystal seed with metal foil so that all the side surfaces as well as the bottom surface of the crystal seed are surrounded by the foil.
SILICON CARBIDE SUBSTRATE AND METHOD FOR MANUFACTURING SILICON CARBIDE SUBSTRATE
A ratio obtained by dividing a number of pits by a number of screw dislocations is equal to or smaller than 1%. The first main surface has a surface roughness equal to or smaller than 0.15 nm. An absolute value of a difference between the first wave number and the second wave number is equal to or smaller than 0.2 cm.sup.−1, and an absolute value of a difference between the first full width at half maximum and the second full width at half maximum is equal to or smaller than 0.25 cm.sup.−1.
SILICON CARBIDE WAFER AND SEMICONDUCTOR DEVICE
A silicon carbide wafer has one surface and the other surface opposite to the one surface. An average Rmax roughness of the one surface is 2.0 nm or less, and an average Ra roughness of the one surface is 0.1 nm or less. An edge region is a region in which a distance from an edge of the silicon carbide wafer toward a center is 5% to 75% of a radius of the silicon carbide wafer, and a central region is a region having a radius of 25% of the radius of the silicon carbide wafer at the center of the silicon carbide wafer. A difference between an average Rmax roughness of the edge region of the one surface and an average Rmax roughness of the central region of the one surface is 0.01 nm to 0.5 nm.
MONOLITHIC MICRO-PILLAR PHOTONIC CAVITIES BASED ON III-NITRIDE SEMICONDUCTORS
A method of making a Group III nitride material that includes: providing a substrate; patterning a template on the substrate; depositing a layer of a material comprising aluminum, gallium and nitrogen on the substrate at a temperature; annealing the layer comprising aluminum, gallium and nitrogen; epitaxially growing Distributed Bragg Reflectors to form a structure on the substrate that comprises microcavities; and etching micropillars in the structure for at least 30 seconds with a heated basic solution is described.
Stack comprising single-crystal diamond substrate
A stack including at least a semiconductor drift layer stacked on a single-crystal diamond substrate having a coalescence boundary, wherein the coalescence boundary of the single-crystal diamond substrate is a region that exhibits, in a Raman spectrum at a laser excitation wavelength of 785 nm, a full width at half maximum of a peak near 1332 cm.sup.−1 due to diamond that is observed to be broader than a full width at half maximum of the peak exhibited by a region different from the coalescence boundary, the coalescence boundary has a width of 200 μm or more, and the semiconductor drift layer is stacked on at least the coalescence boundary.
SUBSTRATE DIRECTED SYNTHESIS OF TRANSITION-METAL DICHALCOGENIDE CRYSTALS WITH TUNABLE DIMENSIONALITY AND OPTICAL PROPERTIES
A method of producing transition-metal dichalcogenide crystals includes providing a silicon substrate having a phosphine-treated surface, exposing the phosphine-treated surface of the silicon substrate to a vapor containing a transition metal, and exposing the phosphine-treated surface of the silicon substrate to a vapor containing a chalcogen. A crystal of the transition-metal and the chalcogen is formed on the phosphine-treated surface of the silicon substrate to produce a transition-metal dichalcogenide crystal by chemical vapor deposition.