Patent classifications
C30B25/20
Stack comprising single-crystal diamond substrate
A stack including at least a semiconductor drift layer stacked on a single-crystal diamond substrate having a coalescence boundary, wherein the coalescence boundary of the single-crystal diamond substrate is a region that exhibits, in a Raman spectrum at a laser excitation wavelength of 785 nm, a full width at half maximum of a peak near 1332 cm.sup.−1 due to diamond that is observed to be broader than a full width at half maximum of the peak exhibited by a region different from the coalescence boundary, the coalescence boundary has a width of 200 μm or more, and the semiconductor drift layer is stacked on at least the coalescence boundary.
SiC material and SiC composite material
The present invention relates to an SiC material and an SiC composite material and, more particularly, to an SiC material and an SiC composite material having a diffraction intensity ratio (I) of an X-ray diffraction peak, calculated by formula 1 down below, of less than 1.5. The present invention can provide an SiC material and an SiC composite material which can be etched evenly when exposed to plasma and thereby reduce the occurrence of cracks, holes and so forth. [Formula 1] Diffraction intensity ratio (I)=(peak intensity of plane (200)+peak intensity of plane (220))/peak intensity of plane (111).
Diamond crystal substrate, method for producing diamond crystal substrate, and method for homo-epitaxially growing diamond crystal
A diamond crystal substrate has a substrate surface that is one crystal plane among (100), (111), and (110) and that has atomic steps and terraces structure at an off-angle of 7° or less excluding 0°.
Diamond crystal substrate, method for producing diamond crystal substrate, and method for homo-epitaxially growing diamond crystal
A diamond crystal substrate has a substrate surface that is one crystal plane among (100), (111), and (110) and that has atomic steps and terraces structure at an off-angle of 7° or less excluding 0°.
SiC EPITAXIAL WAFER, AND METHOD OF MANUFACTURING THE SAME
A method of manufacturing a SiC epitaxial wafer in which a SiC epitaxial layer is formed on a SiC single crystal substrate, the method including identifying a total number of large-pit defects caused by micropipes in the SiC single crystal substrate and large-pit defects caused by substrate carbon inclusions, both of which are contained in the SiC epitaxial layer, using microscopic and photoluminescence images. Also disclosed is a method of manufacturing a SiC epitaxial wafer in which a SiC epitaxial layer is formed on a single crystal substrate, the method including identifying locations of the large-pit defects caused by micropipes in the SiC single crystal substrate and the large-pit defects caused by substrate carbon inclusions in the SiC epitaxial layer, using microscopic and photoluminescence images.
SiC EPITAXIAL WAFER, AND METHOD OF MANUFACTURING THE SAME
A method of manufacturing a SiC epitaxial wafer in which a SiC epitaxial layer is formed on a SiC single crystal substrate, the method including identifying a total number of large-pit defects caused by micropipes in the SiC single crystal substrate and large-pit defects caused by substrate carbon inclusions, both of which are contained in the SiC epitaxial layer, using microscopic and photoluminescence images. Also disclosed is a method of manufacturing a SiC epitaxial wafer in which a SiC epitaxial layer is formed on a single crystal substrate, the method including identifying locations of the large-pit defects caused by micropipes in the SiC single crystal substrate and the large-pit defects caused by substrate carbon inclusions in the SiC epitaxial layer, using microscopic and photoluminescence images.
SILICON CARBIDE EPITAXIAL SUBSTRATE AND METHOD OF MANUFACTURING SILICON CARBIDE SEMICONDUCTOR DEVICE
A silicon carbide epitaxial substrate according to a present disclosure includes a silicon carbide substrate and a silicon carbide epitaxial layer disposed on the silicon carbide substrate. The silicon carbide epitaxial layer includes a boundary surface in contact with the silicon carbide substrate and a main surface opposite to the boundary surface. The main surface has an outer circumferential edge, an outer circumferential region extending within 5 mm from the outer circumferential edge, and a central region surrounded by the outer circumferential region. When an area density of double Shockley stacking faults in the outer circumferential region is defined as a first area density, and an area density of double Shockley stacking faults in the central region is defined as a second area density, the first area density is five or more times as large as the second area density, the second area density is 0.2 cm.sup.−2 or more.
MANUFACTURING METHOD FOR SEMICONDUCTOR SILICON WAFER
A semiconductor silicon wafer manufacturing method is provided, where P aggregate defects and SF in an epitaxial layer can be suppressed. A silicon wafer substrate cut from a monocrystal ingot is doped with phosphorus and has a resistivity of 1.05 mΩ.Math.cm or less and a concentration of solid-solution oxygen of 0.9×10.sup.18 atoms/cm.sup.3. The method includes steps of mirror-polishing substrates and heat treatment, where after the mirror-polishing step, the substrate is kept at a temperature from 700° C. to 850° for 30 to 120 minutes, then after the temperature rise, kept at a temperature from 100° C. to 1250° for 30 to 120 minutes, and after cooling, kept at a temperature from 700° C. to 450° C. for less than 10 minutes as an experience time. The heat treatment step is performed in a mixture gas of hydrogen and argon. The method includes an epitaxial layer deposition step to a thickness of 1.3 μm to 10.0 μm.
MANUFACTURING METHOD FOR SEMICONDUCTOR SILICON WAFER
A semiconductor silicon wafer manufacturing method is provided, where P aggregate defects and SF in an epitaxial layer can be suppressed. A silicon wafer substrate cut from a monocrystal ingot is doped with phosphorus and has a resistivity of 1.05 mΩ.Math.cm or less and a concentration of solid-solution oxygen of 0.9×10.sup.18 atoms/cm.sup.3. The method includes steps of mirror-polishing substrates and heat treatment, where after the mirror-polishing step, the substrate is kept at a temperature from 700° C. to 850° for 30 to 120 minutes, then after the temperature rise, kept at a temperature from 100° C. to 1250° for 30 to 120 minutes, and after cooling, kept at a temperature from 700° C. to 450° C. for less than 10 minutes as an experience time. The heat treatment step is performed in a mixture gas of hydrogen and argon. The method includes an epitaxial layer deposition step to a thickness of 1.3 μm to 10.0 μm.
FILM FORMATION APPARATUS AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE
A film formation apparatus includes a stage, a heater, a mist supply source, a superheated vapor supply source, and a delivery device. The stage is configured to allow a substrate to be mounted thereon. The heater is configured to heat the substrate. The mist supply source is configured to supply mist of a solution that comprises solvent and a film material dissolved in the solvent. The superheated vapor supply source is configured to supply a superheated vapor of a same material as the solvent. The delivery device is configured to deliver the mist and the superheated vapor toward a surface of the substrate to grow a film containing the film material on the surface of the substrate.