Patent classifications
C30B29/403
AlN MONOCRYSTAL PLATE
An AlN monocrystal plate disclosed herein may include: a first surface in a thickness direction; and a second surface opposing the first surface. A metal component containing region may be disposed substantially parallel to the first surface in an intermediate portion between the first surface and the second surface. In the metal component containing region, a plurality of metal components may be introduced and distributed. A type of the metal components may be Ga.
Group III nitride semiconductor substrate
According to the present invention, there is provided a group III nitride semiconductor substrate (free-standing substrate 30) that is formed of group III nitride semiconductor crystals. Both exposed first and second main surfaces in a relationship of top and bottom are semipolar planes. A variation coefficient of an emission wavelength of each of the first and second main surfaces, which is calculated by dividing a standard deviation of an emission wavelength by an average value of the emission wavelength, is 0.05% or less in photoluminescence (PL) measurement in which mapping is performed in units of an area of 1 mm.sup.2 by emitting helium-cadmium (He—Cd) laser, which has a wavelength of 325 nm and an output of 10 mW or more and 40 mW or less, at room temperature. In a case where devices are manufactured over the free-standing substrate 30, variations in quality among the devices are suppressed.
High quality group-III metal nitride seed crystal and method of making
High quality ammonothermal group III metal nitride crystals having a pattern of locally-approximately-linear arrays of threading dislocations, methods of manufacturing high quality ammonothermal group III metal nitride crystals, and methods of using such crystals are disclosed. The crystals are useful for seed bulk crystal growth and as substrates for light emitting diodes, laser diodes, transistors, photodetectors, solar cells, and for photoelectrochemical water splitting for hydrogen generation devices.
HVPE apparatus and methods for growing indium nitride and indium nitride materials and structures grown thereby
Hydride phase vapor epitaxy (HVPE) growth apparatus, methods and materials and structures grown thereby. An HVPE reactor includes generation, accumulation, and growth zones. A source material for growth of indium nitride is generated and collected inside the reactor. A first reactive gas reacts with an indium source inside the generation zone to produce a first gas product having an indium-containing compound. The first gas product is cooled and condenses into a liquid or solid condensate or source material having an indium-containing compound. The source material is collected in the accumulation zone. Vapor or gas resulting from evaporation of the condensate forms a second gas product, which reacts with a second reactive gas in the growth zone for growth of indium nitride.
METHOD FOR MANUFACTURING SEMICONDUCTOR SUBSTRATE, SEMICONDUCTOR SUBSTRATE, AND METHOD FOR SUPPRESSING INTRODUCTION OF DISPLACEMENT TO GROWTH LAYER
The problem to be solved by the present invention is to provide novel technology capable of suppressing the introduction of displacement to a growth layer. The present invention, which solves the abovementioned problem, pertains to a method for manufacturing a semiconductor substrate, the method including: a processing step for removing a portion of a base substrate and forming a pattern that includes a minor angle; and a crystal growth step for forming a growth layer on the base substrate where the patter has been formed. In addition, the present invention pertains to a method for suppressing the introduction of displacement to a growth layer, the method including a processing step for removing a portion of the base substrate and forming a pattern that includes a minor angle prior to forming the growth layer on the base substrate.
Optimized heteroepitaxial growth of semiconductors
A method of performing heteroepitaxy comprises exposing a substrate to a carrier gas, a first precursor gas, a Group II/III element, and a second precursor gas, to form a heteroepitaxial growth of one of GaAs, AlAs, InAs, GaP, InP, ZnSe, GaSe, CdSe, InSe, ZnTe, CdTe, GaTe, HgTe, GaSb, InSb, AlSb, CdS, GaN, and AlN on the substrate; wherein the substrate comprises one of GaAs, AlAs, InAs, GaP, InP, ZnSe, GaSe, CdSe, InSe, ZnTe, CdTe, GaTe, HgTe, GaSb, InSb, AlSb, CdS, GaN, and AlN; wherein the carrier gas is H.sub.2, wherein the first precursor is HCl, the Group II/III element comprises at least one of Zn, Cd, Hg, Al, Ga, and In; and wherein the second precursor is one of AsH.sub.3 (arsine), PH.sub.3 (phosphine), H.sub.2Se (hydrogen selenide), H.sub.2Te (hydrogen telluride), SbH.sub.3 (hydrogen antimonide), H.sub.2S (hydrogen sulfide), and NH.sub.3 (ammonia). The process may be an HVPE (hydride vapor phase epitaxy) process.
Group III nitride crystal, group III nitride substrate, and method of manufacturing group III nitride crystal
A group III nitride crystal, wherein the group III nitride crystal is doped with an N-type dopant and a germanium element, the concentration of the N-type dopant is 1×10.sup.19 cm.sup.−3 or more, and the concentration of the germanium element is nine times or more higher than the concentration of the N-type dopant.
INDIUM PHOSPHIDE SUBSTRATE, SEMICONDUCTOR EPITAXIAL WAFER, AND METHOD FOR PRODUCING INDIUM PHOSPHIDE SUBSTRATE
Provided is an indium phosphide substrate, a semiconductor epitaxial wafer, and a method for producing an indium phosphide substrate, which can satisfactorily suppress warpage of the back surface of the substrate. The indium phosphide substrate includes a main surface for forming an epitaxial crystal layer and a back surface opposite to the main surface, wherein the back surface has a SORI value of 2.5 μm or less, as measured with the back surface of the indium phosphide substrate facing upward.
SEMICONDUCTOR GROWTH-ANNEAL CYCLING
A method of fabricating a semiconductor device includes providing a substrate, implementing a growth procedure to form a semiconductor layer supported by the substrate, performing an anneal of the semiconductor layer, the anneal being conducted at a higher temperature than the growth procedure, and repeating the growth procedure and the anneal. The anneal is conducted at or above a decomposition temperature for the semiconductor layer.
APPARATUS FOR HEATING MULTIPLE CRUCIBLES
A crucible device includes a heating chamber, at least a first crucible in which a first crystal is growable, and at least a second crucible in which a second crystal is growable. The first crucible and the second crucible are arranged within the heating chamber spaced apart from each other along a horizontal and vertical and any orientational direction. The crucible device further comprises a heating system arranged within the heating chamber, wherein the heating system is configured for adjusting a temperature along the horizontal and vertical and any orientational directions.