A ceramic electronic device includes a multilayer chip in which each of a plurality of dielectric layers and each of a plurality of internal electrode layers including Ni as a main phase are alternately stacked. At least one of the plurality of dielectric layers includes a secondary phase including Si, at an interface between the at least one of the plurality of dielectric layers and one of the plurality of internal electrode layers next to the at least one of the plurality of dielectric layers. The one of the plurality of internal electrode layers includes a layer including an additive element including one or more of Au, Pt, Cu, Fe, Cr, Zn, and In, at a region contacting the secondary phase at the interface.

The present disclosure provides a ceramic sintered body having a favorable dielectric constant. In some embodiments of the present disclosure, the ceramic sintered body includes a semiconductor ceramic phase dispersed in a dielectric ceramic phase, wherein the semiconductor ceramic phase and the dielectric ceramic phase jointly form a percolative composite, and a volume fraction of the semiconductor ceramic phase is close to and less than a percolation threshold.

Disclosed herein are embodiments of materials having high thermal conductivity along with a high dielectric constants. In some embodiments, a two phase composite ceramic material can be formed having a contiguous aluminum oxide phase with a secondary phase embedded within the continuous phase. Example secondary phases include calcium titanate, strontium titanate, or titanium dioxide.

Disclosed herein are embodiments of materials having high thermal conductivity along with a high dielectric constants. In some embodiments, a two phase composite ceramic material can be formed having a contiguous aluminum oxide phase with a secondary phase embedded within the continuous phase. Example secondary phases include calcium titanate, strontium titanate, or titanium dioxide.

A multi-layer ceramic capacitor includes: a ceramic body that includes a plurality of ceramic layers laminated in one axial direction and includes polycrystal having a Perovskite structure as a main phase, the Perovskite structure containing calcium and zirconium and being expressed by a general expression ABO.sub.3, the polycrystal containing silicon, boron, and lithium;

first and second internal electrodes alternately disposed between the ceramic layers; a first external electrode provided on an outer surface of the ceramic body and connected to the first internal electrodes; and a second external electrode provided on the outer surface of the ceramic body and connected to the second internal electrodes, the multi-layer ceramic capacitor satisfying 0.2858V+0.4371?C.sub.Li?0.1306V+3.0391, where V (mm.sup.3) represents a volume of the ceramic body, and C.sub.Li (atm %) represents a concentration of the lithium when a concentration of a B-site element of the main phase of the polycrystal is 100 atm %.

A multilayer electronic component includes a dielectric layer and internal electrodes; wherein the dielectric layer includes a rare earth element, Mn, and Ti. The rare earth element includes a first rare earth element including Dy and Tb, and a second rare earth element including a rare earth element different from the first rare earth element. The number of moles of the rare earth element is defined as RE, the number of moles of Dy is defined as A1, the number of moles of Tb is defined as A2 based on 100 moles of Ti included in the dielectric layer, and 0.5 mol?RE?0.9 mol and 1<A2/A1 are satisfied. The number of moles of the second subcomponent element based on 100 moles of Ti included in the dielectric layer is 0.2 mole or more and 0.5 mole or less.

Provided is an improved multilayered ceramic capacitor and an electronic device comprising the multilayered ceramic capacitor. The multilayer ceramic capacitor comprises first conductive plates electrically connected to first external terminations and second conductive plates electrically connected to second external terminations. The first conductive plates and second conductive plates form a capacitive couple. A ceramic portion is between the first conductive plates and said second conductive plates wherein the ceramic portion comprises paraelectric ceramic dielectric. The multilayer ceramic capacitor has a rated DC voltage and a rated AC V.sub.PP wherein the rated AC V.sub.PP is higher than the rated DC voltage.

Provided is an improved multilayered ceramic capacitor and an electronic device comprising the multilayered ceramic capacitor. The multilayer ceramic capacitor comprises first conductive plates electrically connected to first external terminations and second conductive plates electrically connected to second external terminations. The first conductive plates and second conductive plates form a capacitive couple. A ceramic portion is between the first conductive plates and said second conductive plates wherein the ceramic portion comprises paraelectric ceramic dielectric. The multilayer ceramic capacitor has a rated DC voltage and a rated AC V.sub.PP wherein the rated AC V.sub.PP is higher than the rated DC voltage.

A multilayer ceramic electronic component includes: a body part including dielectric layers and internal electrodes disposed to face each other with respective dielectric layers interposed therebetween; and external electrodes disposed on an outer surface of the body part and electrically connected to the internal electrodes. The dielectric layer includes grains including: a semiconductive or conductive grain core region containing a base material represented by ABO.sub.3, where A is at least one of Ba, Sr, and Ca, and B is at least one of Ti, Zr, and Hf, and a doping material including a rare earth element; and an insulating grain shell region enclosing the grain core region.

A polycrystalline dielectric thin film and capacitor element has a small dielectric loss tan . The polycrystalline dielectric thin film, in which the main composition is a perovskite oxynitride. The perovskite oxynitride is expressed by the compositional formula AaBbOoNn (a+b+o+n=5), where a/b>1 and n0.7.