Patent classifications
C23C14/165
PVD DEPOSITED TERNARY AND QUATERNARY NITI ALLOYS AND METHODS OF MAKING SAME
Ternary and quaternary shape memory alloys, particularly nickel-titanium based quaternary and quaternary shape memory alloys, are disclosed and made by a method employing physical vapor deposition (PVD), such as by sputtering, of NiTiX, wherein X is a ternary metal constituent. By employing PVD processing, ternary and quaternary NiTi alloy bulk materials may be made in in the as-deposited state such that the configuration and conformation of a desired precursor material, e.g., wires, tubes, planar materials, curvilinear, or as the near finished end product, such as a hypotube for stent manufacture, semilunar for cardiac valves or conical for embolic or caval filters, is formed on a removable deposition substrate in the configuration and conformation of the precursor material or near-finished end product.
ENGINEERED MULTI-DIMENSIONAL METALLURGICAL PROPERTIES IN PVD MATERIALS
Multi-layer metal or pseudometallic materials having engineered anisotropy are disclosed. The multi-layer materials having defined engineered grain orientations in each layer of the multi-layer material and bond layers between adjacent layers orthogonal to the grain orientations. This configuration distributes applied stress across the plurality of layers in the multi-layer metal material and around a neutral axis of the multi-layer metal material and increases the overall mechanical properties of the disclosed multi-layer metal material relative to conventional wrought metal materials of the same or similar chemical constitution. The microstructure of each layer, group of layers, or across multiple layers may be tailored to the intended application of a device made from the material. Individual layers may be tuned for property variations, such as gradients, or to adjust the bond layer characteristics. A method of making the multi-layer metal materials by physical vapor deposition to deposit each layer as crystalline grain structures and allow for layer-by-layer control over the physical, mechanical and chemical properties of each layer in the multi-layer metal as well as a bond layer between adjacent layers is disclosed.
SPUTTERING REACTION CHAMBER AND PROCESS ASSEMBLY OF SPUTTERING REACTION CHAMBER
The present disclosure provides a sputtering reaction chamber and a process assembly of the sputtering reaction chamber. The process assembly includes a shield, and the shield includes an integrally formed body member and a cover ring member, wherein the body member may be in a ring shape. The cover ring member may extend from a bottom of the body member to an inner side of the body member and may be configured to press an edge of a to-be-processed workpiece when a process is performed. A cooling channel may be arranged in the cover ring member and the body member and may be configured to cool the cover ring member and the body member by transferring coolant. The process assembly of the sputtering reaction chamber and the sputtering reaction chamber provided by the present disclosure can reduce heat radiation of the process assembly to the to-be-processed workpiece and released gases and impurities to effectively reduce a whisker defect and improve a product yield.
LOW TEMPERATURE SYNTHESIS OF NiAl THIN FILMS
Contacting a multiplicity of seed crystals with an amorphous metallic alloy layer to form an amorphous precursor film or depositing an amorphous precursor film on a substrate and annealing the amorphous precursor film at a temperature between 50° C. and 400° C. to yield the metallic film with grains separated by grain boundaries.
PVD SYSTEM AND COLLIMATOR
A physical vapor deposition (PVD) system is disclosed. The PVD system includes a pedestal configured to hold a semiconductor wafer, a cover plate configured to hold a target, and a collimator between the pedestal and the cover plate. The collimator includes a plurality of passages configured to pass source material travelling from the cover plate toward the pedestal at an angle less than a threshold angle with respect to a line perpendicular to a surface of the pedestal facing the cover plate, where the collimator is configured to block source material travelling from the cover plate toward the pedestal at an angle greater than the threshold angle, where a first passage of the plurality of passages has a first passage length, where a second passage of the plurality of passages has a second passage length, and where the first passage length is less than the second passage length.
Coated valve components with corrosion resistant sliding surfaces
A valve component comprising a substrate with a sliding surface, the sliding surface being designed to be subjected to sliding against another surface during operation of the valve, wherein at least a portion of the sliding surface is coated with a coating comprising an under-layer comprising tungsten and an upper-layer deposited atop the under-layer, said upper-layer comprising diamond-like-carbon, wherein the under-layer comprises carbon and has a layer thickness of at least 11 micrometers, and the upper-layer has a lower coefficient of friction than the under-layer and has a layer thickness of at least 1.5 micrometers.
Oxidation-Resistant Coated Superalloy
A coating-substrate combination includes: a Ni-based superalloy substrate comprising, by weight percent: 2.0-5.1 Cr; 0.9-3.3 Mo; 3.9-9.8 W; 2.2-6.8 Ta; 5.4-6.5 Al; 1.8-12.8 Co; 2.8-5.8 Re; 2.8-7.2 Ru; and a coating comprising, exclusive of Pt group elements, by weight percent: Ni as a largest content; 5.8-9.3 Al; 4.4-25 Cr; 3.0-13.5 Co; up to 6.0 Ta, if any; up to 6.2 W, if any; up to 2.4 Mo, if any; 0.3-0.6 Hf; 0.1-0.4 Si; up to 0.6 Y, if any; up to 0.4 Zr, if any; up to 1.0 Re, if any.
WAFER HOLDER FOR FILM DEPOSITION CHAMBER
The present disclosure provides a flexible workpiece pedestal capable of tilting a workpiece support surface. The workpiece pedestal further includes a heater mounted on the workpiece support surface. The heater includes a plurality of heating sources such as heating coils. The plurality of heating sources in the heater allows heating the workpiece at different temperatures for different zones of the workpiece. For example, the workpiece can have a central zone heated by a first heating coil, a first outer ring zone that is outside of the central zone heated by a second heating coil, a second outer ring zone that is outside of the first outer ring zone heated by a third heating coil. By using the tunable heating feature and the tilting feature of the workpiece pedestal, the present disclosure can reduce or eliminate the shadowing effect problem of the related workpiece pedestal in the art.
COPPER ALLOY FILM WITH HIGH STRENGTH AND HIGH CONDUCTIVITY
A method of forming a component can include electrochemically depositing a metallic material onto a carrier component to a thickness of greater than 50 microns. The metallic material can include crystal grains and at least 90% of the crystal grains can include nanotwin boundaries. The metallic material can include a Copper-Silver alloy (Cu—Ag) with between about 0.5-2 at %-Ag.
Manufacturing method for semiconductor laminated film, and semiconductor laminated film
A method of producing a semiconductor laminate film includes forming a semiconductor layer containing silicon and germanium on a silicon substrate by a sputtering method. In the sputtering method, a film formation temperature of the semiconductor layer is less than 500° C., and a film formation pressure of the semiconductor layer ranges from 1 mTorr to 11 mTorr, or, a film formation temperature of the semiconductor layer is less than 600° C., and a film formation pressure of the semiconductor layer is equal to or more than 2 mTorr and less than 5 mTorr. The sputtering method uses a sputtering gas having a volume ratio of a hydrogen gas of less than 0.1%, and the semiconductor layer satisfies a relationship of t≤0.881×x.sup.−4.79, where t represents a thickness (nm) of the semiconductor layer, and x represents a ratio of the number of germanium atoms to a sum of the number of silicon atoms and the number of germanium atoms in the semiconductor layer.