A method for temperature compensation of a test tone used in meter verification is provided. The method uses a drive amplifier to provide a drive signal to a drive circuit, wherein the drive circuit includes a drive mechanism in a meter assembly of a vibratory meter. The method measures a first maximum amplitude of the drive signal at a first temperature of the drive circuit, and measures a second maximum amplitude of the drive signal at a second temperature of the drive circuit. The method also determines a maximum amplitude-to-temperature relationship for the drive circuit based on the first maximum amplitude at the first temperature and the second maximum amplitude at the second temperature.

An operational amplifier with totem pole connected output transistors having inputs coupled to multiplexers for selectable coupling of signals and voltage levels thereto. The high and low output transistors may be forced hard on or hard off in addition to normal coupling of signals thereto. The operation of the output transistors may be dynamically changed to pass only positive going signals, negative going signals, placed in a tristate high impedance state, hard connected to a supply voltage and/or hard connected to supply common return. A core independent peripheral (CIP) may also be coupled to the operational amplifier for dynamically changing the multiplexer inputs in real time, as can external control signals to a control circuit coupled to the multiplexers.

A calibration circuit for calibrating a peak detector configured to detect a signal peak amplitude of an oscillator, including: a calibration oscillator configured to be supplied by at least two different supply voltages to generate respective calibration signals; a calibration peak detector configured to detect a calibration signal peak amplitude of each of the calibration signals; and a logic circuit configured to calibrate the peak detector based on the detected calibration signal peak amplitudes.

A calibration circuit for calibrating a peak detector configured to detect a signal peak amplitude of an oscillator, including: a calibration oscillator configured to be supplied by at least two different supply voltages to generate respective calibration signals; a calibration peak detector configured to detect a calibration signal peak amplitude of each of the calibration signals; and a logic circuit configured to calibrate the peak detector based on the detected calibration signal peak amplitudes.

A radio frequency (RF) power detector is disclosed. The RF power detector includes an envelope detector having an RF signal terminal and a current mode terminal, wherein the envelope detector is configured to detect peak voltages of an RF signal at the RF signal terminal. Further included is a detector current mirror having a first mirror branch coupled to the current mode terminal and a second mirror branch configured to create a detector current that is proportional to a branch current through the first mirror branch in response to peak voltages detected by the envelope detector.

A method of determining a phase misalignment between a first signal generated from a first signal path and a second signal generated from a second signal path may include obtaining multiple samples of the first signal proximate to when the first signal crosses zero wherein the first signal can be approximated as linear; obtaining multiple samples of the second signal proximate to when the second signal crosses zero wherein the first signal can be approximated as linear; based on the multiple samples of the first signal, approximating a first time at which the first signal crosses zero; based on the multiple samples of the second signal, approximating a second time at which the second signal crosses zero; and determining the phase misalignment between the first signal and the second signal based on a difference between the first time and the second time.

A method of determining a phase misalignment between a first signal generated from a first signal path and a second signal generated from a second signal path may include obtaining multiple samples of the first signal proximate to when the first signal crosses zero wherein the first signal can be approximated as linear; obtaining multiple samples of the second signal proximate to when the second signal crosses zero wherein the first signal can be approximated as linear; based on the multiple samples of the first signal, approximating a first time at which the first signal crosses zero; based on the multiple samples of the second signal, approximating a second time at which the second signal crosses zero; and determining the phase misalignment between the first signal and the second signal based on a difference between the first time and the second time.

Certain aspects of the present disclosure provide a voltage transient detection circuit. The circuit generally includes a first switch having a first terminal coupled to an input signal source node, and a second switch having a first terminal coupled to the input signal source node. The apparatus includes a first shunt capacitive element coupled to a second terminal of the first switch, a second shunt capacitive element coupled to a second terminal of the second switch, a differential circuit having a first input coupled to the second terminal of the first switch, a second input coupled to the second terminal of the second switch, and an output coupled to an output node of the voltage transient detection circuit. For certain aspects, the apparatus also includes a first current source (selectively) coupled to the first shunt capacitive element and a second current source (selectively) coupled to the second shunt capacitive element.

A circuit includes a peak detector, a diode, a dynamic clamp circuit, and an offset correction circuit. The peak detector generates a voltage on the peak detector output proportional to a lowest voltage on the peak defector input. The anode of the diode is coupled to the peak detector input. The dynamic clamp circuit is coupled to the peak detector input and is configured to clamp a voltage on the peak detector input responsive to a voltage on the diode's anode being greater than the lowest voltage on the peak detector's input. The offset correction circuit is coupled to the peak detector output and is configured to generate an output signal whose amplitude is offset from an amplitude of the peak detector output.

A circuit includes a peak detector, a diode, a dynamic clamp circuit, and an offset correction circuit. The peak detector generates a voltage on the peak detector output proportional to a lowest voltage on the peak defector input. The anode of the diode is coupled to the peak detector input. The dynamic clamp circuit is coupled to the peak detector input and is configured to clamp a voltage on the peak detector input responsive to a voltage on the diode's anode being greater than the lowest voltage on the peak detector's input. The offset correction circuit is coupled to the peak detector output and is configured to generate an output signal whose amplitude is offset from an amplitude of the peak detector output.