A harmonic distortion separation method, nonlinear character determination method, apparatus and system where a phase difference between an inherent harmonic and a generated harmonic is determined by using multiple groups of input power, output power and fundamental magnitudes of a memoryless nonlinear transfer function of a nonlinear model of a system to be measured, and power of a harmonic generated by the system to be measured is separated by using the phase difference. In an embodiment, the phase difference between the inherent harmonic and the generated harmonic is first determined by using an assumption that a model coefficient is a constant according to the set nonlinear model, then the harmonic separation is performed by using the phase difference, and the power of the harmonic generated by the system to be measured is calculated.

An adhesive may include an adhesive structure and an adhesive composition. The adhesive structure may include a graft copolymer. The adhesive composition may include at least about 1 wt. % and not greater than 40 wt. % of a macromonomer component for a total weight of the adhesive composition, at least about 50 wt. % and not greater than about 98 wt. % of a (meth)acrylic based polymeric component A for a total weight of the adhesive composition, and at least about 0.1 wt. % and not greater than about 30 wt. % of a tackifier component for a total weight of the adhesive composition. The macromonomer component may have a weight-average molecular weight of at least 1000 g/mol and a glass transition temperature (Tg) of at least about 40 C. The (meth)acrylic based polymeric component A may have a glass transition temperature (Tg) of not greater than about 20 C.

Various embodiments relate to classifying comparators based on comparator offsets. A method may include applying, via a strobe, a first voltage to each of a first input and a second input of a comparator to generate a number of output signals from the comparator, wherein each output signal has one of a first polarity and a second polarity. The method may further include in response to each of the number of output signals being the first polarity, applying, via a strobe, an external offset voltage having the second polarity to the comparator to generate a second number of output signals. Further, the method may include in response to each of the second number of output signals being the same polarity, identifying the comparator as a reliable comparator.

A differential phase and amplitude detector circuit is presented. Two source follower circuits respectively based on NMOS and PMOS transistors are used to charge and discharge a sampling capacitor asymmetrically to provide a measurement of phase and/or amplitude difference between two signals of a substantially same frequency. The measurement can be made in one cycle, with the charging of the sampling capacitor performed during a first half cycle where a voltage difference between the two signals is positive, and the discharging during a second half cycle where a voltage difference between the two signals is negative. Biasing of the two source follower circuits enable an excess current flow between the two transistors of the two source follower circuits beyond a biasing current of the transistors to charge the sampling capacitor during the first half cycle, and disable the excess current flow between the two transistors during the second half cycle.

There are provided a method, a system and a device for calibrating a frequency of a driving voltage waveform for a linear resonance device. An actual sampling frequency is continuously corrected, so that a difference between a measured natural frequency of the linear resonance device obtained during a calibration process and a frequency of a standard driving voltage waveform stored in a driving chip for the linear resonance device is in a predetermined range. The driving chip outputs a driving waveform at a finally corrected actual sampling frequency, to drive the linear resonance device. Further, only an actual sampling frequency is required to be adjusted, and it is not required to modify waveform data stored in the driving chip for the linear resonance device.

Systems and methods may be used to measure a frequency of a power delivery system and/or of a supply signal transmitted to a load. A system may record an input waveform, determine a frequency of the input waveform at a present time based at least in part on the input waveform and a derivative of the input waveform, and control an operation of a power delivery system based at least in part on the determined frequency.

A differential phase and amplitude detector circuit is presented. Two source follower circuits respectively based on NMOS and PMOS transistors are used to charge and discharge a sampling capacitor asymmetrically to provide a measurement of phase and/or amplitude difference between two signals of a substantially same frequency. The measurement can be made in one cycle, with the charging of the sampling capacitor performed during a first half cycle where a voltage difference between the two signals is positive, and the discharging during a second half cycle where a voltage difference between the two signals is negative. Biasing of the two source follower circuits enable an excess current flow between the two transistors of the two source follower circuits beyond a biasing current of the transistors to charge the sampling capacitor during the first half cycle, and disable the excess current flow between the two transistors during the second half cycle.

The present disclosure provides a method and apparatus for adjusting a qubit frequency, an electronic device and a readable storage medium. For at least two frequency-adjustable qubits in a multi-bit quantum chip, a corresponding upper-limit/lower-limit setting parameter is determined through an upper-limit frequency and a lower-limit frequency centered by a target frequency and in combination with a fitting corresponding relationship, thus determining a rate between a change of a frequency and a change of a setting parameter. After the target setting parameter is set for each qubit, the parameter for another qubit directly coupled to the qubit is adjusted to the upper-limit setting parameter and the lower-limit setting parameter, and then the actual frequency of a current qubit is determined according to a current upper-limit frequency and a current lower-limit frequency.

In certain aspects of the disclosure, a frequency monitor includes a counter configured to receive a monitored clock signal, to count a number of periods of the monitored clock signal over a predetermined time duration, and to output a count value corresponding to the number of periods of the monitored clock signal. The frequency monitor also includes a comparator configured to receive the count value from the counter, to receive an expected count value, to compare the count value from the counter with the expected count value, and to output a pass status signal or a fail status signal based on the comparison.

A method includes reading first and second timer count values from a timer. The first timer count value is associated with a first time point, and the second timer count value is associated with a second time point. Also, the method includes calculating a difference between the first and the second timer count values, and determining whether the difference is within a range. The range is based on a desired executing frequency to perform a computing task, a variation of the desired executing frequency, and a timer frequency. Further, based on the difference not being within the range, the method includes setting an error flag value to be true and incrementing an error count value.