G01R23/005

ADAPTIVE LEARNING BASED ON ELECTROENCEPHALOGRAPHIC DATA
20190056438 · 2019-02-21 ·

Systems and a method for adaptive learning style curriculum tailoring through electroencephalography (EEG) are provided. In one or more aspects, a system includes one or more devices to capture raw EEG data associated with one or more first persons attending an information exchange session. A first processor can perform a first processing of the captured raw EEG data to generate EEG frequency data. A communication circuit communicates the EEG frequency data to a central processor. The central processor can process the EEG frequency data to generate a feedback related to attentiveness of the one or more first persons. The feedback can enable a second person to adapt one or more materials presented in the information exchange session based on the feedback for enhanced audience attentiveness.

ON-CHIP FREQUENCY MONITORING
20190041440 · 2019-02-07 ·

In certain aspects of the disclosure, a frequency monitor includes a counter configured to receive a monitored clock signal, to count a number of periods of the monitored clock signal over a predetermined time duration, and to output a count value corresponding to the number of periods of the monitored clock signal. The frequency monitor also includes a comparator configured to receive the count value from the counter, to receive an expected count value, to compare the count value from the counter with the expected count value, and to output a pass status signal or a fail status signal based on the comparison.

Plug-in energy sensor with load injection and monitoring

Described implementations monitor potential voltage at a location to determine device usage at the location. The implementations utilize a plug-in energy sensor that is plugged directly into any electrical outlet at the location and measures deviation in voltage at the location. Once plugged into an electrical outlet, the plug-in energy sensor monitors one or more of the positive line and ground and/or the neutral line and ground for changes in potential voltage at the location. The plug-in energy sensor may also inject a load (resistive load, inductive load, capacitive load) into the electrical circuit at the location and then measure the signal or response to the injected load.

METHOD OF MONITORING A CLOCK SIGNAL, CORRESPONDING DEVICE AND SYSTEM

A method comprises receiving an input clock signal having a clock frequency band between a lower frequency limit value and an upper frequency limit value, dividing the clock frequency band in a set of frequency ranges having a set of frequency limit values that include the lower frequency limit value and the upper frequency limit value, comparing the frequency of the clock signal with the set of frequency limit values to produce comparison indicators having a first logic value when the measured frequency fails to exceed at least one frequency limit value and having a second logic value when the measured frequency exceeds the at least one frequency limit value, and, as a result of at least one of the logic values of comparison indicators having the second logic value, producing a global flag signal indicating that the measured frequency falls outside of a frequency range.

Idle Tone Dispersion Device And Frequency Ratio Measuring Device
20180343014 · 2018-11-29 ·

An idle tone dispersion device outputs a frequency delta-sigma modulation signal obtained by using either one of a reference signal and a measured signal to perform frequency delta-sigma modulation of the other and dispersing an idle tone. The idle tone dispersion device includes n (n is any natural number equal to or larger than 2) frequency delta-sigma modulation sections and an adder configured to add up output signals of the n frequency delta-sigma modulation sections and output the frequency delta-sigma modulation signal. Each of the n frequency delta-sigma modulation sections uses either one of the reference signal and the measured signal to perform the frequency delta-sigma modulation of the other. At least one of the reference signal and the measured signal includes jitter including a frequency component higher than a frequency of an idle tone of an output signal of the frequency delta-sigma modulation section.

Voltage detecting device and battery pack monitoring system

A voltage detecting device detects a differential voltage between two input nodes having a non-zero common mode voltage. A differential voltage detecting circuit 5 detects the differential voltage by sampling each voltage of the input nodes and outputs a detection voltage indicating a detection result. A leak canceling circuit generates a compensating current, which flows in opposition to a leak current flowing out from the input nodes in correspondence to an operation of the differential voltage detecting circuit. An operation control part controls the leak canceling circuit to perform or stop a canceling operation. A failure diagnosing part performs a failure diagnosis about the leak canceling circuit based on a first detection value and a second detection value of the detection voltages, which are detected during periods when the leak canceling circuit performs and stops the canceling operation.

Wireless power transfer method and apparatus and method of detecting resonant frequency used in wireless power transfer

Disclosed herein are a wireless power transfer apparatus, a method for wireless power transfer and a method of detecting a resonant frequency used in a wireless power charging system or a wireless power transfer. The wireless power transfer apparatus includes a plurality of transmission coils, each of which transmits power to a receiver coil through magnetic resonance; a signal generator transmitting signals having different resonant frequencies to the plurality of transmission coils, the signal generator being connected to the plurality of transmission coils; and a feedback unit transferring information on amounts of powers which are respectively output by the plurality of transmission coils to the signal generator.

RF phase offset detection circuit
10056888 · 2018-08-21 · ·

An RF phase offset detection system, which includes a first RF phase detector and a second RF phase detector, and measures a first phase offset between a first RF signal and a second RF signal, is disclosed. Each of the first RF signal and the second RF signal has a common RF frequency. The first RF phase detector detects and filters the first RF signal and the second RF signal to provide a first detection signal. The second RF phase detector receives and phase-shifts the second RF signal to provide a phase-shifted RF signal. The second RF phase detector further detects and filters the first RF signal and the phase-shifted RF signal to provide a second detection signal, such that a combination of the first detection signal and the second detection signal is representative of the first phase offset.

Phase control device

A phase control device includes a connection error detection unit. The connection error detection unit includes a phase sequence detection unit that detects a phase sequence of voltage signals, a phase sequence detection unit that detects a phase sequence of current signals, a collation unit that collates the phase sequence of the voltage signals and the phase sequence of the current signals and determines that a connection error is present when the phase sequences are different, phase difference detection units that detect a phase difference between the voltage signal and the current signal, and a phase difference determination unit that determines, when the phase differences output from the phase difference detection units fall without a determination range, that a connection error is present.

SYSTEMS FOR AND METHODS OF CLOCK FREQUENCY MONITORING

Systems and methods relate a device for monitoring or tracking clock frequency. The device can include a first circuit configured to receive a reference clock signal and provide a first signal in response to a first number of cycles of the reference clock signal, and a second circuit configured to receive a sample clock signal and provide a second signal in response to the first signal. The second signal is indicative of a second number of cycles of the sample clock signal occurring during the first number of cycles of the reference clock signal. The device can also include a third circuit configured to determine a ratio of a first frequency of the reference clock signal to a second frequency of the sample signal using the second signal.