The disclosed embodiments relate to components of a memory system that support timing-drift calibration. In specific embodiments, this memory system contains a memory device (or multiple devices) which includes a clock distribution circuit and an oscillator circuit which can generate a frequency, wherein a change in the frequency is indicative of a timing drift of the clock distribution circuit. The memory device also includes a measurement circuit which is configured to measure the frequency of the oscillator circuit.

Disclosed herein are systems and methods for estimating a period and frequency of a waveform. In one embodiment a system may comprise an input configured to receive a signal comprising a representation of the waveform. A period determination subsystem may calculate an estimated period of the signal based on a period determination function. An estimated period adjustment subsystem may determine an adjustment to the estimated period based on a result of the period determination function. A quality indicator subsystem configured to evaluate a measurement quality indictor function based on the estimated period, and to selectively update the period of the waveform based on the measurement quality indicator. A control action subsystem configured to implement a control action based on the period of the waveform.

Disclosed herein are systems and methods for estimating a period and frequency of a waveform. In one embodiment a system may comprise an input configured to receive a signal comprising a representation of the waveform. A period determination subsystem may calculate an estimated period of the signal based on a period determination function. An estimated period adjustment subsystem may determine an adjustment to the estimated period based on a result of the period determination function. A quality indicator subsystem configured to evaluate a measurement quality indictor function based on the estimated period, and to selectively update the period of the waveform based on the measurement quality indicator. A control action subsystem configured to implement a control action based on the period of the waveform.

The present invention provides a deformation apparatus that deforms a surface of a member, the apparatus comprising: a plurality of actuators each of which is configured to apply a force to the member to deform the surface; a measurement device configured to measure an induced electromotive force generated in a first actuator of the plurality of actuators; and a controller configured to control the plurality of actuators, wherein the controller causes the measurement device to measure a temporal variation of an induced electromotive force in the first actuator while vibrating the member by using a second actuator, of the plurality of actuators, which is different from the first actuator, converts the measured temporal variation of the induced electromotive force into a frequency spectrum, and detects an abnormality in the first actuator based on the frequency spectrum.

The present invention provides a deformation apparatus that deforms a surface of a member, the apparatus comprising: a plurality of actuators each of which is configured to apply a force to the member to deform the surface; a measurement device configured to measure an induced electromotive force generated in a first actuator of the plurality of actuators; and a controller configured to control the plurality of actuators, wherein the controller causes the measurement device to measure a temporal variation of an induced electromotive force in the first actuator while vibrating the member by using a second actuator, of the plurality of actuators, which is different from the first actuator, converts the measured temporal variation of the induced electromotive force into a frequency spectrum, and detects an abnormality in the first actuator based on the frequency spectrum.

The present invention discloses a waveform measuring method. It converts the waveform to be measured into two corresponding square waves by two comparators. When the hardware logic device receives the signal from the host computer software to start waveform acquisition, it acquires two square waves and simultaneously starts the counter to count with a fixed high frequency clock. When the waveform is flipped, if the count value is less than the set filter value, the waveform is filtered out; if the count value is greater than the set filter value, the hardware logic device saves the waveform and count value and clears the counter to zero. The number of waveform flips is judged whether the set value is reached, and if not, the count is recounted; if it is reached, the waveform acquisition is stopped, and then the waveform and count values saved by the hardware logic device are read and optimized by the host computer software. According to the test requirements, the corresponding algorithm is executed, and the calculation results are output. It improves the accuracy and precision of the measurement and increases the flexibility of the measuring method.

The invention discloses a test method for high-speed signal frequency measurement and signal integrity. Through the combination of integrated circuit digital-analog test system and programmable digital system, the trigger signal of the test system is synchronized with the digital signal of the peripheral test circuit to generate 100 M square wave and data to verify whether the chip can work normally. When the enabling signals of the integrated circuit digital-analog test system are detected by the peripheral test circuit, the corresponding square wave signal of 100 M or the preset data signal are given to the tested digital chip. The two enabling signals have the same priority, and then sample the output of the tested digital chip, wherein, the collected output waveform needs to be logically calculated and divided into a 10 M square wave, and the frequency measurement is carried out, then the processed results are returned to the test system. The test system accurately selects the chip with correct function according to the data, and eliminates the chip with abnormal work.

The invention discloses a test method for high-speed signal frequency measurement and signal integrity. Through the combination of integrated circuit digital-analog test system and programmable digital system, the trigger signal of the test system is synchronized with the digital signal of the peripheral test circuit to generate 100 M square wave and data to verify whether the chip can work normally. When the enabling signals of the integrated circuit digital-analog test system are detected by the peripheral test circuit, the corresponding square wave signal of 100 M or the preset data signal are given to the tested digital chip. The two enabling signals have the same priority, and then sample the output of the tested digital chip, wherein, the collected output waveform needs to be logically calculated and divided into a 10 M square wave, and the frequency measurement is carried out, then the processed results are returned to the test system. The test system accurately selects the chip with correct function according to the data, and eliminates the chip with abnormal work.

Determining the ratio between two frequencies can be a useful electronic building block in different electronic circuits with very divers functionalities. The invention comprises a circuit for determining a frequency ratio between a first input signal having a first frequency and a second input signal having a second frequency, wherein the circuit comprises: a controlled fractional frequency divider arranged for generating a divided signal having a divided frequency being substantially the first frequency divided by a control signal; a frequency phase detector arranged for generating a phase difference signal based on a frequency phase difference between the divided frequency of the divided signal and the second frequency of the second input signal; and a loop filter arranged for generating the control signal based on the phase difference signal; wherein a loop is formed by the controlled fractional frequency divider, the divided signal, the frequency phase detector, the phase difference signal, the loop filter and the control signal; wherein the loop filter filters the phase difference signal such that instability of the loop is prevented; and wherein the control signal, preferably the magnitude of the control signal, is indicative of the frequency ratio.

Determining the ratio between two frequencies can be a useful electronic building block in different electronic circuits with very divers functionalities. The invention comprises a circuit for determining a frequency ratio between a first input signal having a first frequency and a second input signal having a second frequency, wherein the circuit comprises: a controlled fractional frequency divider arranged for generating a divided signal having a divided frequency being substantially the first frequency divided by a control signal; a frequency phase detector arranged for generating a phase difference signal based on a frequency phase difference between the divided frequency of the divided signal and the second frequency of the second input signal; and a loop filter arranged for generating the control signal based on the phase difference signal; wherein a loop is formed by the controlled fractional frequency divider, the divided signal, the frequency phase detector, the phase difference signal, the loop filter and the control signal; wherein the loop filter filters the phase difference signal such that instability of the loop is prevented; and wherein the control signal, preferably the magnitude of the control signal, is indicative of the frequency ratio.