Patent classifications
G01R25/02
Electronic circuitry, system, base station, mobile device and method
An electronic circuitry is proposed. The electronic circuitry comprises a directional coupler comprising a first port configured to receive an input signal from a signal source, a second port configured to output the input signal for transmission to a load, a third port configured to output a forward signal based on the input signal, and a fourth port configured to output a reverse signal based on a reflection of the input signal received at the second port. The electronic circuitry further comprises a Time-to-Digital converter, TDC, coupled to the third port and the fourth port. The TDC is configured to determine a phase difference between the forward signal and the reverse signal.
Phasor measurement units, synchrophasor systems and methods thereof
A phasor measurement unit (PMU) of the present disclosure measures phasor, i.e., magnitude and phase angle of voltage and current, and related data from a specific location on the electrical gird synchronized to a common time source. The time-synchronized phasor is called a synchrophasor. In a system of the present disclosure, a plurality of PMUs transmit the synchrophasors and related data to a phasor data concentrator (PDC), which aggregates and time-aligns the data for real time and post analysis. The PMU of the present disclosure further functions as a power quality meter determining at least one of symmetrical components' phasor, frequency, rate of change of frequency, high-speed digital inputs, analog fundamental power and/or displacement power factor.
Phasor measurement units, synchrophasor systems and methods thereof
A phasor measurement unit (PMU) of the present disclosure measures phasor, i.e., magnitude and phase angle of voltage and current, and related data from a specific location on the electrical gird synchronized to a common time source. The time-synchronized phasor is called a synchrophasor. In a system of the present disclosure, a plurality of PMUs transmit the synchrophasors and related data to a phasor data concentrator (PDC), which aggregates and time-aligns the data for real time and post analysis. The PMU of the present disclosure further functions as a power quality meter determining at least one of symmetrical components' phasor, frequency, rate of change of frequency, high-speed digital inputs, analog fundamental power and/or displacement power factor.
PHASOR MEASUREMENT UNITS, SYNCHROPHASOR SYSTEMS AND METHODS THEREOF
A phasor measurement unit (PMU) of the present disclosure measures phasor, i.e., magnitude and phase angle of voltage and current, and related data from a specific location on the electrical gird synchronized to a common time source. The time-synchronized phasor is called a synchrophasor. In a system of the present disclosure, a plurality of PMUs transmit the synchrophasors and related data to a phasor data concentrator (PDC), which aggregates and time-aligns the data for real time and post analysis. The PMU of the present disclosure further functions as a power quality meter determining at least one of symmetrical components' phasor, frequency, rate of change of frequency, high-speed digital inputs, analog fundamental power and/or displacement power factor.
PHASOR MEASUREMENT UNITS, SYNCHROPHASOR SYSTEMS AND METHODS THEREOF
A phasor measurement unit (PMU) of the present disclosure measures phasor, i.e., magnitude and phase angle of voltage and current, and related data from a specific location on the electrical gird synchronized to a common time source. The time-synchronized phasor is called a synchrophasor. In a system of the present disclosure, a plurality of PMUs transmit the synchrophasors and related data to a phasor data concentrator (PDC), which aggregates and time-aligns the data for real time and post analysis. The PMU of the present disclosure further functions as a power quality meter determining at least one of symmetrical components' phasor, frequency, rate of change of frequency, high-speed digital inputs, analog fundamental power and/or displacement power factor.
Methods and apparatus for processing a substrate
Methods and apparatus for processing a substrate are provided herein. For example, apparatus can include a first voltage/current (V/I) probe configured to connect to an input side of a matching network of the processing chamber and a second V/I probe configured to connect to an output side of the matching network and a processor coupled to the first V/I probe and the second V/I probe and configured to, based on a phase gap between a V and I of an RF signal detected by at least one of the first V/I probe or the second V/I probe at a target frequency, detect a minimum phase gap between the V and I, and control at least one of impedance tuning of the matching network or process control of the processing chamber using at least one of a peak or RMS of V, I and phase measured at the target frequency or under sweeping frequency.
Methods and apparatus for processing a substrate
Methods and apparatus for processing a substrate are provided herein. For example, apparatus can include a first voltage/current (V/I) probe configured to connect to an input side of a matching network of the processing chamber and a second V/I probe configured to connect to an output side of the matching network and a processor coupled to the first V/I probe and the second V/I probe and configured to, based on a phase gap between a V and I of an RF signal detected by at least one of the first V/I probe or the second V/I probe at a target frequency, detect a minimum phase gap between the V and I, and control at least one of impedance tuning of the matching network or process control of the processing chamber using at least one of a peak or RMS of V, I and phase measured at the target frequency or under sweeping frequency.
Electronic circuit for delivering signals in quadrature
Embodiments provide a device that includes a first circuit having a first input to receive a first sine wave signal and a second input to receive a second sine wave signal in quadrature with respect to each other and a current mode logic gate having a first input coupled to a first output of the first circuit and a second input coupled to a second output of the first circuit. The first circuit configured to deliver a first square wave signal and a second square wave signal. The current mode logic gate is configured to deliver a third square wave signal at a first level and a fourth square wave signal at a second level when the first and second square wave signals are simultaneously at their first levels and the first square wave signal is ahead of the second square wave signal.