Patent classifications
G01R29/24
Charge detection sensor and potential measurement system
To achieve decreased noise and improved sensitivity by reducing parasitic capacitance in a charge detection sensor. The charge detection sensor includes a detection element, a detection electrode, and a contact. The detection element is provided on one surface of a semiconductor substrate and detects a charge. The detection electrode is provided on another surface different from the one surface of the semiconductor substrate. The contact penetrates the semiconductor substrate and electrically connects the detection electrode and the detection element. Since no wiring layer is formed between the detection element and the detection electrode, the parasitic capacitance is reduced.
Electrostatic detections
In some examples, an electronic device includes a printed circuit board. In some examples, the printed circuit board includes a conductive base layer. In some examples, the conductive base layer is an electrode to produce a signal indicative of a change in an omnidirectional electrostatic field corresponding to a moving object. In some examples, the printed circuit board includes a via coupled to the conductive base layer. In some examples, the via is disposed through an intermediate layer of the printed circuit board. In some examples, the printed circuit board includes an integrated circuit coupled to the via. In some examples, the integrated circuit is to detect, using a machine learning model, a direction of the moving object in the omnidirectional electrostatic field based on a feature of the signal.
Electrostatic detections
In some examples, an electronic device includes a printed circuit board. In some examples, the printed circuit board includes a conductive base layer. In some examples, the conductive base layer is an electrode to produce a signal indicative of a change in an omnidirectional electrostatic field corresponding to a moving object. In some examples, the printed circuit board includes a via coupled to the conductive base layer. In some examples, the via is disposed through an intermediate layer of the printed circuit board. In some examples, the printed circuit board includes an integrated circuit coupled to the via. In some examples, the integrated circuit is to detect, using a machine learning model, a direction of the moving object in the omnidirectional electrostatic field based on a feature of the signal.
WAFER METROLOGY TECHNOLOGIES
Various approaches can be used to interrogate a surface such as a surface of a layered semiconductor structure on a semiconductor wafer. Certain approaches employ Second Harmonic Generation and in some cases may utilize pump and probe radiation. Other approaches involve determining current flow from a sample illuminated with radiation. Decay constants can be measured to provide information regarding the sample. Additionally, electric and/or magnetic field biases can be applied to the sample to provide additional information.
WAFER METROLOGY TECHNOLOGIES
Various approaches can be used to interrogate a surface such as a surface of a layered semiconductor structure on a semiconductor wafer. Certain approaches employ Second Harmonic Generation and in some cases may utilize pump and probe radiation. Other approaches involve determining current flow from a sample illuminated with radiation. Decay constants can be measured to provide information regarding the sample. Additionally, electric and/or magnetic field biases can be applied to the sample to provide additional information.
Optical systems and methods of characterizing high-k dielectrics
The disclosed technology generally relates to characterization of semiconductor structures, and more particularly to optical characterization of high-k dielectric materials. A method includes providing a semiconductor structure comprising a semiconductor and a high-k dielectric layer formed over the semiconductor, wherein the dielectric layer has electron traps formed therein. The method additionally includes at least partially transmitting an incident light having an incident energy through the high-k dielectric layer and at least partially absorbing the incident light in the semiconductor. The method additionally includes measuring a nonlinear optical spectrum resulting from the light having the energy different from the incident energy, the nonlinear optical spectrum having a first region and a second region, wherein the first region changes at a different rate in intensity compared to the second region. The method further includes determining from the nonlinear optical spectrum one or both of a first time constant from the first region and a second time constant from the second region, and determining a trap density in the high-k dielectric layer based on the one or both of the first time constant and the second time constant.
Optical systems and methods of characterizing high-k dielectrics
The disclosed technology generally relates to characterization of semiconductor structures, and more particularly to optical characterization of high-k dielectric materials. A method includes providing a semiconductor structure comprising a semiconductor and a high-k dielectric layer formed over the semiconductor, wherein the dielectric layer has electron traps formed therein. The method additionally includes at least partially transmitting an incident light having an incident energy through the high-k dielectric layer and at least partially absorbing the incident light in the semiconductor. The method additionally includes measuring a nonlinear optical spectrum resulting from the light having the energy different from the incident energy, the nonlinear optical spectrum having a first region and a second region, wherein the first region changes at a different rate in intensity compared to the second region. The method further includes determining from the nonlinear optical spectrum one or both of a first time constant from the first region and a second time constant from the second region, and determining a trap density in the high-k dielectric layer based on the one or both of the first time constant and the second time constant.
Method for induced quantum dots for material characterization, qubits, and quantum computers
A method is disclosed, including positioning a lead wire of a gate chip at a distance of less than 10 nm from a semiconductor heterostructure. The heterostructure includes a surface layer and a subsurface layer. The method also includes inducing an electrostatic potential in the subsurface layer by applying a voltage to the lead wire. The method also includes loading a charge carrier into the subsurface layer. The method also includes detecting the charge carrier in the subsurface layer of the semiconductor heterostructure by emitting a radio-frequency pulse using a resonator coupled to the at least one lead wire of the gate chip, detecting a reflected pulse of the emitted radio-frequency pulse, and determining a phase shift of the reflected pulse relative to the emitted radio-frequency pulse. The method also includes characterizing the quantum dot by measuring valley splitting of the quantum dot.
Pump and probe type second harmonic generation metrology
Various approaches to can be used to interrogate a surface such as a surface of a layered semiconductor structure on a semiconductor wafer. Certain approaches employ Second Harmonic Generation and in some cases may utilize pump and probe radiation. Other approaches involve determining current flow from a sample illuminated with radiation.
Pump and probe type second harmonic generation metrology
Various approaches to can be used to interrogate a surface such as a surface of a layered semiconductor structure on a semiconductor wafer. Certain approaches employ Second Harmonic Generation and in some cases may utilize pump and probe radiation. Other approaches involve determining current flow from a sample illuminated with radiation.