A method for providing a jitter signal for modulating a switching frequency of a power switch for a power converter. The method comprising receiving a drive signal representative of the switching frequency of the power switch, detecting the switching frequency from the drive signal, determining if the switching frequency is less than a first threshold frequency, and modulating a frequency of the jitter signal in response to determining if the switching frequency is less than the first threshold frequency.

In one embodiment, a method to differentiate between causes of noise in an electrocardiogram (ECG) signal. The method connecting to at least one sensing electrode and obtaining the ECG signal from the at least one sensing electrode. The method also includes detecting noise on the ECG signal and detecting ancillary conditions. The method also includes associating the noise on the ECG signal with at least one of the ancillary conditions and providing an actionable indication to a patient associated with the noise on the ECG signal.

In one embodiment, a method to differentiate between causes of noise in an electrocardiogram (ECG) signal. The method connecting to at least one sensing electrode and obtaining the ECG signal from the at least one sensing electrode. The method also includes detecting noise on the ECG signal and detecting ancillary conditions. The method also includes associating the noise on the ECG signal with at least one of the ancillary conditions and providing an actionable indication to a patient associated with the noise on the ECG signal.

Techniques regarding error detection in one or more generated signals based on one or more signal-to-noise ratios are provided. For example, one or more embodiments described herein can include a system, which can include a memory that can store computer executable components. The system can also include a processor, operably coupled to the memory, and that can execute the computer executable components stored in the memory. The computer executable components can include a signal analysis component that can determine a signal-to-noise ratio associated with a generated signal, wherein the signal-to-noise ratio incorporates a signal value based on a reference signal and a noise value based on a difference between the reference signal and an acquired signal.

An apparatus and method for detecting a change in electrical properties in a system is disclosed. Embodiments of the disclosure enable the detection of a change in electrical properties in a system by, in response to a load generated on a power delivery network power in at least part of the system, measuring noise induced in the power delivery network in response to the load. Based on the measured noise, a dynamic-response property of the power delivery network is determined and the dynamic-response property is compared to a stored reference dynamic-response property of the power delivery network based on a predetermined load. In the event of a difference between the dynamic-response property and the reference dynamic-response property, a response to the event is triggered to indicate tampering with the power delivery network.

An apparatus and method for detecting a change in electrical properties in a system is disclosed. Embodiments of the disclosure enable the detection of a change in electrical properties in a system by, in response to a load generated on a power delivery network power in at least part of the system, measuring noise induced in the power delivery network in response to the load. Based on the measured noise, a dynamic-response property of the power delivery network is determined and the dynamic-response property is compared to a stored reference dynamic-response property of the power delivery network based on a predetermined load. In the event of a difference between the dynamic-response property and the reference dynamic-response property, a response to the event is triggered to indicate tampering with the power delivery network.

Provided are an array communication device that makes phase correction between a plurality of arrays having bi-directional amplifiers possible and a method for controlling the array communication device. This array communication device comprises a plurality of array units that are connected to a common signal processing unit and each comprise an antenna, amplifier, and phase shifter. The array communication device further comprises first-directional couplers that are respectively disposed between the antennas and amplifiers of the array units and divide or combine signals, second-directional couplers that are respectively disposed between the phase shifters of the array units and the signal processing unit and divide or combine signals, and phase comparison means that each receive at least one from among a signal from a first-directional coupler and a signal from a second-directional coupler and a signal serving as a phase reference and carry out phase comparison and correction.

A measurement individual difference correction system for measuring voltage to ground includes a cable comprising a conductor, a floor panel provided on a floor and comprising a conductor, an oscillation circuit connected between the cable and the floor panel, and configured to output a signal, a voltage-to-ground measurement device comprising an upper electrode and a lower electrode positioned apart from each other, and configured to measure voltage between the upper electrode and the lower electrode, and a computation device in communication with the voltage-to-ground measurement device, in which the computation device calculates combined impedance of electrostatic capacity between the user and the cable, impedance of the user, and electrostatic capacity between the user and the upper electrode, by using voltage of the signal output from the oscillation circuit and the voltage between the upper electrode and the lower electrode measured by the voltage-to-ground measurement device.

Introduced herein is a technique that reliably measures on-die noise of logic in a chip. The introduced technique places a noise measurement system in partitions of the chip that are expected to cause the most noise. The introduced technique utilizes a continuous free-running clock that feeds functional frequency to the noise measurement circuit throughout the noise measurement scan test. This allows the noise measurement circuit to measure the voltage noise of the logic during a shift phase, which was not possible in the conventional noise measurement method. Also, by being able to measure the voltage noise during a shift phase and hence in both phases of the scan test, the introduced technique can perform a more comprehensive noise measurement not only during ATE testing but as part of IST in the field.

Introduced herein is a technique that reliably measures on-die noise of logic in a chip. The introduced technique places a noise measurement system in partitions of the chip that are expected to cause the most noise. The introduced technique utilizes a continuous free-running clock that feeds functional frequency to the noise measurement circuit throughout the noise measurement scan test. This allows the noise measurement circuit to measure the voltage noise of the logic during a shift phase, which was not possible in the conventional noise measurement method. Also, by being able to measure the voltage noise during a shift phase and hence in both phases of the scan test, the introduced technique can perform a more comprehensive noise measurement not only during ATE testing but as part of IST in the field.