Patent classifications
G01R31/50
Transistor bridge failure test
A driver circuit arrangement for driving a transistor bridge, which includes at least a first half-bridge composed of a low-side transistor and a high-side transistor, is described herein. In accordance with one example of the description, the circuit includes a current source and a detection circuit. The current source is operably coupled to the high-side transistor of the first half-bridge and configured to supply a test current to the first half bridge. The detection circuit is configured to compare a voltage sense signal, which represents the voltage across the high-side transistor of the first half-bridge, with at least one first threshold to detect, dependent on the result of this comparison, whether a short-circuit is present in the first half-bridge.
Wireless Mechanism For Detecting an Open or Closed Container, and Methods of Making and Using the Same
An electronic device including a continuity sensor and electrical circuitry configured to detect and report the continuity state of an article, container or product packaging is disclosed. The continuity sensor includes a first substrate with first and second coils thereon, and a second substrate with a third coil thereon. The first coil has an integrated circuit electrically connected thereto. The first substrate is part of, or is attached or secured to a part of the article, container or packaging. The second substrate is another part of, or is attached or secured to another part of the article, container or packaging. One of the article, container or packaging parts is (re)movable with respect to the other part. The first and second coils have one coupling when the article, container or packaging is closed or sealed, and a different coupling when the article, container or packaging is open or unsealed.
System and method of testing single DUT through multiple cores in parallel
The present disclosure provides a method of testing a single device under test (DUT) through multiple cores in parallel, which includes steps as follows. The test quantity of the DUT is calculated; the test quantity of the DUT is evenly allocated to to a plurality of test cores, so as to control a period of testing the DUT through the test cores in parallel.
System and method of testing single DUT through multiple cores in parallel
The present disclosure provides a method of testing a single device under test (DUT) through multiple cores in parallel, which includes steps as follows. The test quantity of the DUT is calculated; the test quantity of the DUT is evenly allocated to to a plurality of test cores, so as to control a period of testing the DUT through the test cores in parallel.
Systems and methods for circuit failure protection
In accordance with at least one aspect of this disclosure, a controller for an aircraft electrical system includes, a software safe module. In embodiments, the software safe module can be configured to determine whether there was a sudden power failure upon controller initialization, and cause operation of the controller in a software safe mode if there was a sudden power failure such that manual intervention is required to leave the software safe mode to prevent repetitive power failure of the controller.
Systems and methods for circuit failure protection
In accordance with at least one aspect of this disclosure, a controller for an aircraft electrical system includes, a software safe module. In embodiments, the software safe module can be configured to determine whether there was a sudden power failure upon controller initialization, and cause operation of the controller in a software safe mode if there was a sudden power failure such that manual intervention is required to leave the software safe mode to prevent repetitive power failure of the controller.
PARALLEL PLATE CAPACITOR SYSTEM FOR DETERMINING IMPEDANCE CHARACTERISTICS OF MATERIAL UNDER TEST (MUT)
Various aspects of the disclosure relate to evaluating the electromagnetic impedance characteristics of a material under test (MUT) over a range of frequencies. In particular aspects, a system includes: an electrically non-conducting container sized to hold the MUT, the electrically non-conducting container having a first opening at a first end thereof and a second opening at a second, opposite end thereof; a transmitting electrode assembly at the first end of the electrically non-conducting container, the transmitting electrode assembly having a transmitting electrode with a transmitting surface; and a receiving electrode assembly at the second end of the electrically non-conducting container, the receiving electrode assembly having a receiving electrode with a receiving surface, wherein the receiving electrode is approximately parallel with the transmitting electrode, and wherein the transmitting surface of the transmitting electrode is larger than the receiving surface of the receiving electrode.
PARALLEL PLATE CAPACITOR SYSTEM FOR DETERMINING IMPEDANCE CHARACTERISTICS OF MATERIAL UNDER TEST (MUT)
Various aspects of the disclosure relate to evaluating the electromagnetic impedance characteristics of a material under test (MUT) over a range of frequencies. In particular aspects, a system includes: an electrically non-conducting container sized to hold the MUT, the electrically non-conducting container having a first opening at a first end thereof and a second opening at a second, opposite end thereof; a transmitting electrode assembly at the first end of the electrically non-conducting container, the transmitting electrode assembly having a transmitting electrode with a transmitting surface; and a receiving electrode assembly at the second end of the electrically non-conducting container, the receiving electrode assembly having a receiving electrode with a receiving surface, wherein the receiving electrode is approximately parallel with the transmitting electrode, and wherein the transmitting surface of the transmitting electrode is larger than the receiving surface of the receiving electrode.
ARC suppressor, system, and method
Device, circuit, system, and method for arc suppression. A contact separation detector is configured to output an indication of a separation state of a pair of electrical contacts. A contact bypass circuit, coupled to the contact separation detector, is configured to provide an electrical bypass between the pair of contacts based on the indication.
APPARATUS FOR DETERMINING ABNORMAL STATUS OF WIRELESS POWER TRANSMISSION COIL
Provided is an apparatus for determining an abnormal status of a wireless power transmission coil, the apparatus including an input-current sensor configured to detect an input current and provided at an input side of a power transmission coil, an output-current sensor configured to detect an output current and provided at an output side of the transmission coil, and a controller configured to compare each of the input current and the output current with a predetermined threshold value corresponding thereto to determine whether a disconnection or a short circuit occurs in the transmission coil.