Ring modulators based on interdigitated junctions may be driven in full or partial standing wave mode and, active regions (providing the modulation) and light-absorptive regions (e.g. providing electrical conduction) are placed in a pattern inside a resonant cavity in order to match the maxima and minima of the optical field, respectively. The pattern may be periodic to match the periodicity of a typical electromagnetic field which is periodic with the wavelength. It may also be aperiodic in the case that the cross-section or materials are engineered along the direction of propagation such that the propagation constant (and thus wavelength, i.e. optical wave “local periodicity”) change along the propagation direction.

An example optical polarization controller can include a substantially planar substrate and a waveguide unit cell formed on the substantially planar substrate. The waveguide unit cell can include a first out-of-plane waveguide portion and a second out-of-plane waveguide portion coupled to the first out-of-plane waveguide portion. Each of the first and second out-of-plane waveguide portions can respectively include a core material layer arranged between a first optical cladding layer having a first stress-response property and a second optical cladding layer having a second stress-response property. The first and second stress-response properties can be different such that each of the first and second out-of-plane waveguide portions is deflected by a deflection angle.

A surface light source, comprising a waveguide layer and a grating structure; the waveguide layer has a first surface and a second surface opposite to each other; the grating structure is provided on the first or second surface of the waveguide layer; and the grating structure is used for guiding light incident to the grating structure to the waveguide layer and performing total reflection propagation in the waveguide layer. Such surface light source structure enables energy and direction of light emitted from a light field modulation layer to be distributed uniformly, and thus the thickness of the surface light source and the number of LEDs in the surface light source are reduced. Also disclosed is a display device.

An integral chip is disclosed by embodiments of the present disclosure, including: two mono-mode vertical coupling gratings, two modulation modules, one 2×1 multi-mode interference coupler, and one dual-mode vertical coupling grating. The integral chip is capable of operating in dual wavelengths and dual polarization states by combination of polarization multiplexing and wavelength division multiplexing so as to realize modulation of complex formats and to enhance data modulation rate.

A PhC all-optical multistep-delay OR-transformation logic gate includes an optical switch unit having a first intermediate-signal output port, a PhC structure unit having a first intermediate-signal input port connected with the first intermediate-signal output port, a reference-light source connected with the reference-light input port of the optical switch unit, a wave absorbing load, a flip-flop unit, and a memory or delayer having an input port connected with a first logic signal and an output port connected with the delay-signal input port of an optical switch unit whose logic-signal input port is connected with a second logic signal; a second intermediate-signal input port of the PhC structure unit is connected with the second intermediate-signal output port of said optical switch unit; a third intermediate-signal output port of the optical switch unit is connected with the wave absorbing load; a clock control-signal is input through the input port of a two-branch waveguide.

The present invention discloses a PIOS with a high extinction ratio based on slab PhCs which comprises an upper slab PhC and a lower slab PhC connected as a whole; the upper slab PhC is a first square-lattice slab PhC, the unit cell of the first square-lattice slab PhC includes a high-refractive-index rotating square pillar, a single first flat dielectric pillar and a background dielectric; the first flat dielectric pillar includes a high-refractive-index dielectric pipe and a low-refractive-index dielectric, or a high-refractive-index flat films, or a low-refractive-index dielectric; the lower slab PhC is a second square-lattice slab PhC with a complete bandgap, the unit cell of said second square-lattice slab PhC includes a high-refractive-index rotating square pillar, a single second flat dielectric pillar and a background dielectric is a low-refractive-index dielectric; and an normalized frequency of the optical switch is 0.41 to 0.4167.

A photonic crystal all-optical D-type flip-flop includes an optical switch unit, a photonic crystal structure unit including two signal-input ends, a signal-output end and an idle port, a wave absorbing load and a reference-light source; the clock signal-input port of the photonic crystal structure unit is connected with a clock control signal; a second port of the photonic crystal structure unit is an intermediate signal-input port, said intermediate signal-input end of the photonic crystal structure unit is connected with a first intermediate signal-output end of the optical selector switch; a logic signal is connected with the first signal-input end of the optical switch unit; the absorbing load is connected with a second intermediate signal-output end of the optical switch unit; said reference-light source is connected with a second signal-input end of the optical switch unit, which is a reference-light input end connecting with the output end of said reference-light source.

An optical clock generator includes a nonlinear cavity unit, a cross-waveguide logic gate unit and a delayer unit; and is of a six-port photonic crystal structure including two reference-light signal-input ports, a feedback-signal-input port, a system-signal and feedback-signal output port and two idle ports; the output port of the cross-waveguide logic gate unit is connected with the input port of the nonlinear cavity unit whose system-signal output port is connected with the input port of said delayer unit whose output port is connected with the input port of the cross-waveguide logic gate unit, the system-signal output port is connected with a two-branch waveguide one of which is used as the system-signal output port, and another is used as the feedback-signal output port and connected to an input port of said delayer unit, the delayer unit performs time delay on an input signal and outputs the signal to the feedback-signal-input port.

The present invention discloses a TMOS based on slab PhCs with a high DOP and a large EXR, which comprises an upper slab PhC and a lower slab PhC; the upper slab PhC is called as a first square-lattice slab PhC with a TE bandgap, the unit cell of the first square-lattice slab PhC includes a high-refractive-index rotating-square pillar, a single first flat dielectric pillar and a background dielectric, the first flat dielectric pillar includes a high-refractive-index dielectric pipe and a low-refractive-index dielectric, or a high-refractive-index flat film, or a low-refractive-index dielectric; the lower slab PhC is a second square-lattice slab PhC with a complete bandgap, wherein the unit cell of the second square-lattice slab PhC includes a high-refractive-index rotating-square pillar, a single second flat dielectric pillar and a background dielectric, and a normalized operating frequency of the TMOS with high DOP and large extinction ratio is 0.252 to 0.267.

The present invention discloses a TEOS with a high extinction ratio based on slab PhCs which comprises an upper slab PhC and a lower slab PhC connected as a whole; the upper slab PhC is a first square-lattice slab PhC, the unit cell of the first square-lattice slab PhC includes a high-refractive-index rotating-square pillar, three first flat dielectric pillars and a background dielectric, the first flat dielectric pillars include a high-refractive-index dielectric pipe and a low-refractive-index dielectric, or 1 to 3 high-refractive-index flat films, or a low-refractive-index dielectric; the lower slab PhC is a second square-lattice slab PhC with a complete bandgap, the unit cell of the second square-lattice slab PhC includes a high-refractive-index rotating-square pillar, three second flat dielectric pillars and a background dielectric is a low-refractive-index dielectric; and an normalized operating frequency of the TEOS is 0.4057 to 0.406.