One illustrative system includes a processor and memory storing instructions that, when executed by the processor, cause the system to receive a device layout including a curvilinear feature, define a plurality of vertices for the curvilinear feature, determine a radius of curvature between a selected vertex in the plurality of vertices and a neighboring vertex in the plurality of vertices, and identify a design rule violation for the curvilinear feature responsive to the radius of curvature being less than a predetermined threshold.

A lithography process is described by a design for a lithographic mask and a description of the lithography configuration, which may include the lithography source, collection/illumination optics, projection optics, resist, and/or subsequent fabrication steps. The actual lithography process uses a lithographic mask fabricated from the mask design, which may be different than the nominal mask design. A mask fabrication model models the process for fabricating the lithographic mask from the mask design. Typically, this is an electron-beam (e-beam) process, which includes e-beam exposure of resist on a mask blank, processing of the exposed resist to form patterned resist, and etching of the mask blank with the patterned resist. The mask fabrication model, usually in conjunction with other process models, is used to estimate a result of the lithography process. Mask correction is then applied to the mask design based on the simulation result.

A lithography process is described by a design for a lithographic mask and a description of the lithography configuration, which may include the lithography source, collection/illumination optics, projection optics, resist, and/or subsequent fabrication steps. The actual lithography process uses a lithographic mask fabricated from the mask design, which may be different than the nominal mask design. A mask fabrication model models the process for fabricating the lithographic mask from the mask design. Typically, this is an electron-beam (e-beam) process, which includes e-beam exposure of resist on a mask blank, processing of the exposed resist to form patterned resist, and etching of the mask blank with the patterned resist. The mask fabrication model, usually in conjunction with other process models, is used to estimate a result of the lithography process. Mask correction is then applied to the mask design based on the simulation result.

A blankmask for extreme ultraviolet lithography includes a reflection film, a capping film, and an absorbing film that are sequentially formed on a transparent substrate, in which the reflection film has a surface roughness of 0.5 nm Ra or less. It is possible to prevent footing of an EUV photomask pattern from occurring, improving flatness of an EUV blankmask, and prevent oxidation and defects of a capping film.

One illustrative system includes a processor and memory storing instructions that, when executed by the processor, cause the system to receive a device layout including a curvilinear feature, define a plurality of vertices for the curvilinear feature, determine a radius of curvature between a selected vertex in the plurality of vertices and a neighboring vertex in the plurality of vertices, and identify a design rule violation for the curvilinear feature responsive to the radius of curvature being less than a predetermined threshold.

One illustrative system includes a processor and memory storing instructions that, when executed by the processor, cause the system to receive a device layout including a curvilinear feature, define a plurality of vertices for the curvilinear feature, determine a radius of curvature between a selected vertex in the plurality of vertices and a neighboring vertex in the plurality of vertices, and identify a design rule violation for the curvilinear feature responsive to the radius of curvature being less than a predetermined threshold.

A method comprising contact-free positioning a template mask wafer having a template device pattern relative to a predetermined surface area section of a device pattern wafer. The template mask wafer includes a semitransparent layer. The method includes contact-free aligning one or more mask alignment marks of the template mask wafer with one or more alignment marks of the device pattern wafer and contacting the mask wafer on the device pattern wafer. The method includes transferring a template device pattern of the template mask wafer onto the predetermined surface area section of the device pattern wafer using an electron beam while heat conduction is distributed throughout the mask wafer to maintain a low temperature rise in the mask wafer during the transferring. A system is also provided.

A method comprising contact-free positioning a template mask wafer having a template device pattern relative to a predetermined surface area section of a device pattern wafer. The template mask wafer includes a semitransparent layer. The method includes contact-free aligning one or more mask alignment marks of the template mask wafer with one or more alignment marks of the device pattern wafer and contacting the mask wafer on the device pattern wafer. The method includes transferring a template device pattern of the template mask wafer onto the predetermined surface area section of the device pattern wafer using an electron beam while heat conduction is distributed throughout the mask wafer to maintain a low temperature rise in the mask wafer during the transferring. A system is also provided.

A division mask includes a main body portion including an opening pattern; and a clamping portion disposed at opposite ends of the main body portion. The clamping portion including at least three branch portions. The branch portions have a smaller width in a direction away from a central line of the division mask.

A division mask includes a main body portion including an opening pattern; and a clamping portion disposed at opposite ends of the main body portion. The clamping portion including at least three branch portions. The branch portions have a smaller width in a direction away from a central line of the division mask.