Fabricating a photomask includes forming a protection layer over a substrate. A plurality of multilayers of reflecting films are formed over the protection layer. A capping layer is formed over the plurality of multilayers. An absorption layer is formed over capping layer. A first photoresist layer is formed over portions of absorption layer. Portions of the first photoresist layer and absorption layer are patterned, forming first openings in absorption layer. The first openings expose portions of the capping layer. Remaining portions of first photoresist layer are removed and a second photoresist layer is formed over portions of absorption layer. The second photoresist layer covers at least the first openings. Portions of the absorption layer and capping layer and plurality of multilayer of reflecting films not covered by the second photoresist layer are patterned, forming second openings. The second openings expose portions of protection layer and second photoresist layer is removed.

Fabricating a photomask includes forming a protection layer over a substrate. A plurality of multilayers of reflecting films are formed over the protection layer. A capping layer is formed over the plurality of multilayers. An absorption layer is formed over capping layer. A first photoresist layer is formed over portions of absorption layer. Portions of the first photoresist layer and absorption layer are patterned, forming first openings in absorption layer. The first openings expose portions of the capping layer. Remaining portions of first photoresist layer are removed and a second photoresist layer is formed over portions of absorption layer. The second photoresist layer covers at least the first openings. Portions of the absorption layer and capping layer and plurality of multilayer of reflecting films not covered by the second photoresist layer are patterned, forming second openings. The second openings expose portions of protection layer and second photoresist layer is removed.

A semiconductor structure comprises a semiconductor substrate, and a multi-layer patterning material film stack formed on the semiconductor substrate. The patterning material film stack comprises at least a hard mask layer and a resist layer formed over the hard mask layer. The hard mask layer is configured to support selective deposition of a metal-containing layer on a developed pattern of the resist layer through inclusion in the hard mask layer of one or more materials inhibiting deposition of the metal-containing layer on portions of the hard mask layer corresponding to respective openings in the resist layer. The hard mask layer illustratively comprises, for example, at least one of a grafted self-assembled monolayer configured to inhibit deposition of the metal-containing layer, and a grafted polymer brush material configured to inhibit deposition of the metal-containing layer.

A semiconductor structure comprises a semiconductor substrate, and a multi-layer patterning material film stack formed on the semiconductor substrate. The patterning material film stack comprises at least a hard mask layer and a resist layer formed over the hard mask layer. The hard mask layer is configured to support selective deposition of a metal-containing layer on a developed pattern of the resist layer through inclusion in the hard mask layer of one or more materials inhibiting deposition of the metal-containing layer on portions of the hard mask layer corresponding to respective openings in the resist layer. The hard mask layer illustratively comprises, for example, at least one of a grafted self-assembled monolayer configured to inhibit deposition of the metal-containing layer, and a grafted polymer brush material configured to inhibit deposition of the metal-containing layer.

A reflective mask includes a substrate, a reflective multilayer disposed over the substrate, a capping layer disposed over the reflective multilayer, an intermediate layer disposed over the capping layer, an absorber layer disposed over the intermediate layer, and a cover layer disposed over the absorber layer. The absorber layer includes one or more layers of an Ir based material, a Pt based material or a Ru based material.

A semiconductor processing system includes a first photolithography system and a second photolithography system. The semiconductor processing system includes a layout database that stores a plurality of layouts indicating features to be formed in a wafer. The semiconductor processing system includes a layout analyzer that analyzes the layouts and selects either the first photolithography system or the second photolithography system based on dimensions of features in the layouts.

A semiconductor processing system includes a first photolithography system and a second photolithography system. The semiconductor processing system includes a layout database that stores a plurality of layouts indicating features to be formed in a wafer. The semiconductor processing system includes a layout analyzer that analyzes the layouts and selects either the first photolithography system or the second photolithography system based on dimensions of features in the layouts.

An extreme ultraviolet mask and method of manufacture thereof includes: providing a glass-ceramic block; forming a glass-ceramic substrate from the glass-ceramic block; and depositing a planarization layer on the glass-ceramic substrate.

An extreme ultraviolet mask and method of manufacture thereof includes: providing a glass-ceramic block; forming a glass-ceramic substrate from the glass-ceramic block; and depositing a planarization layer on the glass-ceramic substrate.

A filtration formed nanostructure pellicle film is disclosed. The filtration formed nanostructure pellicle film includes a plurality of carbon nanofibers that are intersected randomly to form an interconnected network structure in a planar orientation. The interconnected structure allows for a high minimum EUV transmission rate of at least 92%, with a thickness ranging from a lower limit of 3 nm to an upper limit of 100 nm, to allow for effective EUV lithography processing.