The present disclosure relates to a measuring device for measuring a fill level of a material in a container based on time of flight principles, including components that serve to generate, transmit and receive a measurement signal and further serve to convert said measurement signal into an analog intermediate frequency signal having an expected signal frequency within a predetermined frequency range, said intermediate frequency signal including information corresponding to the fill level of the material in the container, wherein an analog to digital converter is provided that serves to subsequently sample the intermediate frequency signal, said analog to digital converter employing a sampling frequency less than the expected signal frequency of intermediate frequency signal.

According to some aspects of the present disclosure, an atomic clock and methods of forming and/or using an atomic clock are disclosed. In one embodiment, an atomic clock includes: a light source configured to illuminate a resonance vapor cell; a narrowband optical filter disposed between the light source and the resonance vapor cell and arranged such that light emitted from the light source passes through the narrowband optical filter and illuminates the resonance vapor cell. The resonance vapor cell is configured to emit a signal corresponding to a hyperfine transition frequency in response to illumination from the light source, and a filter cell is disposed between the light source and the resonance vapor cell and configured to generate optical pumping. An optical detector is configured to detect the emitted signal corresponding to the hyperfine transition frequency.

According to some aspects of the present disclosure, an atomic clock and methods of forming and/or using an atomic clock are disclosed. In one embodiment, an atomic clock includes: a light source configured to illuminate a resonance vapor cell; a narrowband optical filter disposed between the light source and the resonance vapor cell and arranged such that light emitted from the light source passes through the narrowband optical filter and illuminates the resonance vapor cell. The resonance vapor cell is configured to emit a signal corresponding to a hyperfine transition frequency in response to illumination from the light source, and a filter cell is disposed between the light source and the resonance vapor cell and configured to generate optical pumping. An optical detector is configured to detect the emitted signal corresponding to the hyperfine transition frequency.

A semiconductor device includes: a secondary battery; a constant voltage generation circuit that is driven in accordance with the secondary battery; a control logic circuit that is driven with a constant voltage generated by the constant voltage generation circuit and controls the constant voltage generation circuit; and a starting circuit that outputs a control signal for operating the constant voltage generation circuit in correspondence to an initialization signal input from outside in a case in which the constant voltage generation circuit is stopped.

A semiconductor device includes: a secondary battery; a constant voltage generation circuit that is driven in accordance with the secondary battery; a control logic circuit that is driven with a constant voltage generated by the constant voltage generation circuit and controls the constant voltage generation circuit; and a starting circuit that outputs a control signal for operating the constant voltage generation circuit in correspondence to an initialization signal input from outside in a case in which the constant voltage generation circuit is stopped.

Some embodiments include a first oscillator circuit including a first input node to receive a connection from a first resonator, and a first output node to provide a first oscillating signal; a second oscillator circuit including a second input node to receive a connection from a second resonator, and a second output node to provide a second oscillating signal; a frequency measurement circuit coupled to the first output node and the second output node; a code generator including an input node coupled to an output node of the frequency measurement circuit, and an output node to provide a code; and a timing signal generator including a node coupled to the output node of the code generator, an input node coupled to the output node of the first oscillator circuit, an output node to provide an output oscillating signal.

Some embodiments include a first oscillator circuit including a first input node to receive a connection from a first resonator, and a first output node to provide a first oscillating signal; a second oscillator circuit including a second input node to receive a connection from a second resonator, and a second output node to provide a second oscillating signal; a frequency measurement circuit coupled to the first output node and the second output node; a code generator including an input node coupled to an output node of the frequency measurement circuit, and an output node to provide a code; and a timing signal generator including a node coupled to the output node of the code generator, an input node coupled to the output node of the first oscillator circuit, an output node to provide an output oscillating signal.

An integrated circuit comprising, a resonator, a first clock circuit for generating a first clock signal having a first frequency in response to the resonator, a second clock circuit for generating a second clock signal having a second frequency in response to the resonator, wherein the second frequency of the second clock signal is determined by the programmable frequency divider and a clock mode control circuit coupled to the first clock circuit and the second clock circuit, the clock mode control circuit for gradually switching the resonator between the first oscillator circuit and the second oscillator circuit of the integrated circuit, using a shift register based state machine and utilizing the inertia of the resonator to smoothly transition between the two oscillators, to provide a dual mode clock output signal.

An integrated circuit comprising, a resonator, a first clock circuit for generating a first clock signal having a first frequency in response to the resonator, a second clock circuit for generating a second clock signal having a second frequency in response to the resonator, wherein the second frequency of the second clock signal is determined by the programmable frequency divider and a clock mode control circuit coupled to the first clock circuit and the second clock circuit, the clock mode control circuit for gradually switching the resonator between the first oscillator circuit and the second oscillator circuit of the integrated circuit, using a shift register based state machine and utilizing the inertia of the resonator to smoothly transition between the two oscillators, to provide a dual mode clock output signal.

A semiconductor device includes: a secondary battery; a constant voltage generation circuit that is driven in accordance with the secondary battery; a control logic circuit that is driven with a constant voltage generated by the constant voltage generation circuit and controls the constant voltage generation circuit; and a starting circuit that outputs a control signal for operating the constant voltage generation circuit in correspondence to an initialization signal input from outside in a case in which the constant voltage generation circuit is stopped.